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Jatin Bhateja
committed
8338023: Support two vector selectFrom API
Reviewed-by: psandoz, epeter, sviswanathan
1 parent c34fb2c commit 709914f

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89 files changed

+2787
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lines changed

‎src/hotspot/cpu/x86/assembler_x86.cpp‎

Lines changed: 56 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -4738,22 +4738,6 @@ void Assembler::vpermpd(XMMRegister dst, XMMRegister src, int imm8, int vector_l
47384738
emit_int24(0x01, (0xC0 | encode), imm8);
47394739
}
47404740

4741-
void Assembler::evpermi2q(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
4742-
assert(VM_Version::supports_evex(), "");
4743-
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
4744-
attributes.set_is_evex_instruction();
4745-
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
4746-
emit_int16(0x76, (0xC0 | encode));
4747-
}
4748-
4749-
void Assembler::evpermt2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
4750-
assert(VM_Version::supports_avx512_vbmi(), "");
4751-
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
4752-
attributes.set_is_evex_instruction();
4753-
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
4754-
emit_int16(0x7D, (0xC0 | encode));
4755-
}
4756-
47574741
void Assembler::evpmultishiftqb(XMMRegister dst, XMMRegister ctl, XMMRegister src, int vector_len) {
47584742
assert(VM_Version::supports_avx512_vbmi(), "");
47594743
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
@@ -16103,3 +16087,59 @@ void InstructionAttr::set_address_attributes(int tuple_type, int input_size_in_b
1610316087
_input_size_in_bits = input_size_in_bits;
1610416088
}
1610516089
}
16090+
16091+
void Assembler::evpermi2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16092+
assert(VM_Version::supports_avx512_vbmi() && (vector_len == Assembler::AVX_512bit || VM_Version::supports_avx512vl()), "");
16093+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16094+
attributes.set_is_evex_instruction();
16095+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16096+
emit_int16(0x75, (0xC0 | encode));
16097+
}
16098+
16099+
void Assembler::evpermi2w(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16100+
assert(VM_Version::supports_avx512bw() && (vector_len == Assembler::AVX_512bit || VM_Version::supports_avx512vl()), "");
16101+
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16102+
attributes.set_is_evex_instruction();
16103+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16104+
emit_int16(0x75, (0xC0 | encode));
16105+
}
16106+
16107+
void Assembler::evpermi2d(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16108+
assert(VM_Version::supports_evex() && (vector_len == Assembler::AVX_512bit || VM_Version::supports_avx512vl()), "");
16109+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16110+
attributes.set_is_evex_instruction();
16111+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16112+
emit_int16(0x76, (0xC0 | encode));
16113+
}
16114+
16115+
void Assembler::evpermi2q(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16116+
assert(VM_Version::supports_evex() && (vector_len == Assembler::AVX_512bit || VM_Version::supports_avx512vl()), "");
16117+
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16118+
attributes.set_is_evex_instruction();
16119+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16120+
emit_int16(0x76, (0xC0 | encode));
16121+
}
16122+
16123+
void Assembler::evpermi2ps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16124+
assert(VM_Version::supports_evex() && (vector_len == Assembler::AVX_512bit || VM_Version::supports_avx512vl()), "");
16125+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16126+
attributes.set_is_evex_instruction();
16127+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16128+
emit_int16(0x77, (0xC0 | encode));
16129+
}
16130+
16131+
void Assembler::evpermi2pd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16132+
assert(VM_Version::supports_evex() && (vector_len == Assembler::AVX_512bit || VM_Version::supports_avx512vl()), "");
16133+
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16134+
attributes.set_is_evex_instruction();
16135+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16136+
emit_int16(0x77, (0xC0 | encode));
16137+
}
16138+
16139+
void Assembler::evpermt2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
16140+
assert(VM_Version::supports_avx512_vbmi(), "");
16141+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
16142+
attributes.set_is_evex_instruction();
16143+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
16144+
emit_int16(0x7D, (0xC0 | encode));
16145+
}

‎src/hotspot/cpu/x86/assembler_x86.hpp‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1962,9 +1962,14 @@ class Assembler : public AbstractAssembler {
19621962
void vpermilps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
19631963
void vpermilpd(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
19641964
void vpermpd(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1965+
void evpmultishiftqb(XMMRegister dst, XMMRegister ctl, XMMRegister src, int vector_len);
1966+
void evpermi2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1967+
void evpermi2w(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1968+
void evpermi2d(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
19651969
void evpermi2q(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1970+
void evpermi2ps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1971+
void evpermi2pd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
19661972
void evpermt2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1967-
void evpmultishiftqb(XMMRegister dst, XMMRegister ctl, XMMRegister src, int vector_len);
19681973

19691974
void pause();
19701975

‎src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp‎

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6475,3 +6475,30 @@ void C2_MacroAssembler::vector_rearrange_int_float(BasicType bt, XMMRegister dst
64756475
vpermps(dst, shuffle, src, vlen_enc);
64766476
}
64776477
}
6478+
6479+
void C2_MacroAssembler::select_from_two_vectors_evex(BasicType elem_bt, XMMRegister dst, XMMRegister src1,
6480+
XMMRegister src2, int vlen_enc) {
6481+
switch(elem_bt) {
6482+
case T_BYTE:
6483+
evpermi2b(dst, src1, src2, vlen_enc);
6484+
break;
6485+
case T_SHORT:
6486+
evpermi2w(dst, src1, src2, vlen_enc);
6487+
break;
6488+
case T_INT:
6489+
evpermi2d(dst, src1, src2, vlen_enc);
6490+
break;
6491+
case T_LONG:
6492+
evpermi2q(dst, src1, src2, vlen_enc);
6493+
break;
6494+
case T_FLOAT:
6495+
evpermi2ps(dst, src1, src2, vlen_enc);
6496+
break;
6497+
case T_DOUBLE:
6498+
evpermi2pd(dst, src1, src2, vlen_enc);
6499+
break;
6500+
default:
6501+
fatal("Unsupported type %s", type2name(elem_bt));
6502+
break;
6503+
}
6504+
}

‎src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -505,4 +505,6 @@
505505
void vgather8b_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
506506
Register offset, Register rtmp, int vlen_enc);
507507

508+
void select_from_two_vectors_evex(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vlen_enc);
509+
508510
#endif // CPU_X86_C2_MACROASSEMBLER_X86_HPP

‎src/hotspot/cpu/x86/x86.ad‎

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1935,6 +1935,20 @@ bool Matcher::match_rule_supported_vector(int opcode, int vlen, BasicType bt) {
19351935
return false;
19361936
}
19371937
break;
1938+
case Op_SelectFromTwoVector:
1939+
if (size_in_bits < 128 || (size_in_bits < 512 && !VM_Version::supports_avx512vl())) {
1940+
return false;
1941+
}
1942+
if (bt == T_SHORT && !VM_Version::supports_avx512bw()) {
1943+
return false;
1944+
}
1945+
if (bt == T_BYTE && !VM_Version::supports_avx512_vbmi()) {
1946+
return false;
1947+
}
1948+
if ((bt == T_INT || bt == T_FLOAT || bt == T_DOUBLE) && !VM_Version::supports_evex()) {
1949+
return false;
1950+
}
1951+
break;
19381952
case Op_MaskAll:
19391953
if (!VM_Version::supports_evex()) {
19401954
return false;
@@ -10468,3 +10482,16 @@ instruct DoubleClassCheck_reg_reg_vfpclass(rRegI dst, regD src, kReg ktmp, rFlag
1046810482
%}
1046910483
ins_pipe(pipe_slow);
1047010484
%}
10485+
10486+
10487+
instruct vector_selectfrom_twovectors_reg_evex(vec index, vec src1, vec src2)
10488+
%{
10489+
match(Set index (SelectFromTwoVector (Binary index src1) src2));
10490+
format %{ "select_from_two_vector $index, $src1, $src2 \t!" %}
10491+
ins_encode %{
10492+
int vlen_enc = vector_length_encoding(this);
10493+
BasicType bt = Matcher::vector_element_basic_type(this);
10494+
__ select_from_two_vectors_evex(bt, $index$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vlen_enc);
10495+
%}
10496+
ins_pipe(pipe_slow);
10497+
%}

‎src/hotspot/share/adlc/formssel.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4355,7 +4355,7 @@ bool MatchRule::is_vector() const {
43554355
"Replicate","ReverseV","ReverseBytesV",
43564356
"RoundDoubleModeV","RotateLeftV" , "RotateRightV", "LoadVector","StoreVector",
43574357
"LoadVectorGather", "StoreVectorScatter", "LoadVectorGatherMasked", "StoreVectorScatterMasked",
4358-
"VectorTest", "VectorLoadMask", "VectorStoreMask", "VectorBlend", "VectorInsert",
4358+
"SelectFromTwoVector", "VectorTest", "VectorLoadMask", "VectorStoreMask", "VectorBlend", "VectorInsert",
43594359
"VectorRearrange", "VectorLoadShuffle", "VectorLoadConst",
43604360
"VectorCastB2X", "VectorCastS2X", "VectorCastI2X",
43614361
"VectorCastL2X", "VectorCastF2X", "VectorCastD2X", "VectorCastF2HF", "VectorCastHF2F",

‎src/hotspot/share/classfile/vmIntrinsics.hpp‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -981,6 +981,17 @@ class methodHandle;
981981
"Ljdk/internal/vm/vector/VectorSupport$Vector;") \
982982
do_name(vector_ternary_op_name, "ternaryOp") \
983983
\
984+
do_intrinsic(_VectorSelectFromTwoVectorOp, jdk_internal_vm_vector_VectorSupport, vector_select_from_op_name, vector_select_from_op_sig, F_S) \
985+
do_signature(vector_select_from_op_sig, "(Ljava/lang/Class;" \
986+
"Ljava/lang/Class;" \
987+
"I" \
988+
"Ljdk/internal/vm/vector/VectorSupport$Vector;" \
989+
"Ljdk/internal/vm/vector/VectorSupport$Vector;" \
990+
"Ljdk/internal/vm/vector/VectorSupport$Vector;" \
991+
"Ljdk/internal/vm/vector/VectorSupport$SelectFromTwoVector;)" \
992+
"Ljdk/internal/vm/vector/VectorSupport$Vector;") \
993+
do_name(vector_select_from_op_name, "selectFromTwoVectorOp") \
994+
\
984995
do_intrinsic(_VectorFromBitsCoerced, jdk_internal_vm_vector_VectorSupport, vector_frombits_coerced_name, vector_frombits_coerced_sig, F_S) \
985996
do_signature(vector_frombits_coerced_sig, "(Ljava/lang/Class;" \
986997
"Ljava/lang/Class;" \

‎src/hotspot/share/opto/c2compiler.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -818,6 +818,7 @@ bool C2Compiler::is_intrinsic_supported(vmIntrinsics::ID id) {
818818
case vmIntrinsics::_VectorLoadMaskedOp:
819819
case vmIntrinsics::_VectorStoreOp:
820820
case vmIntrinsics::_VectorStoreMaskedOp:
821+
case vmIntrinsics::_VectorSelectFromTwoVectorOp:
821822
case vmIntrinsics::_VectorGatherOp:
822823
case vmIntrinsics::_VectorScatterOp:
823824
case vmIntrinsics::_VectorReductionCoerced:

‎src/hotspot/share/opto/classes.hpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -482,6 +482,7 @@ macro(Digit)
482482
macro(LowerCase)
483483
macro(UpperCase)
484484
macro(Whitespace)
485+
macro(SelectFromTwoVector)
485486
macro(VectorBox)
486487
macro(VectorBoxAllocate)
487488
macro(VectorUnbox)

‎src/hotspot/share/opto/library_call.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -755,6 +755,8 @@ bool LibraryCallKit::try_to_inline(int predicate) {
755755
return inline_vector_extract();
756756
case vmIntrinsics::_VectorCompressExpand:
757757
return inline_vector_compress_expand();
758+
case vmIntrinsics::_VectorSelectFromTwoVectorOp:
759+
return inline_vector_select_from_two_vectors();
758760
case vmIntrinsics::_IndexVector:
759761
return inline_index_vector();
760762
case vmIntrinsics::_IndexPartiallyInUpperRange:

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