8351157: Clean up x86 GC barriers after 32-bit x86 removal

Reviewed-by: kbarrett, wkemper, tschatzl

Author: shipilev

src/hotspot/cpu/x86/c1_MacroAssembler_x86.cpp

@@ -147,7 +147,7 @@ void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_
 // Defines obj, preserves var_size_in_bytes
 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
   if (UseTLAB) {
-    tlab_allocate(noreg, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
+    tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
   } else {
     jmp(slow_case);
   }

src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp

@@ -49,11 +49,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 
   if (!dest_uninitialized) {
-    Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
-#ifndef _LP64
-    __ push(thread);
-    __ get_thread(thread);
-#endif
+    Register thread = r15_thread;
 
     Label filtered;
     Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
@@ -65,12 +61,9 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
       __ cmpb(in_progress, 0);
     }
 
-    NOT_LP64(__ pop(thread);)
-
     __ jcc(Assembler::equal, filtered);
 
     __ push_call_clobbered_registers(false /* save_fpu */);
-#ifdef _LP64
     if (count == c_rarg0) {
       if (addr == c_rarg1) {
         // exactly backwards!!
@@ -88,10 +81,6 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
     } else {
       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
     }
-#else
-    __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry),
-                    addr, count);
-#endif
     __ pop_call_clobbered_registers(false /* save_fpu */);
 
     __ bind(filtered);
@@ -101,7 +90,6 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
                                                              Register addr, Register count, Register tmp) {
   __ push_call_clobbered_registers(false /* save_fpu */);
-#ifdef _LP64
   if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
     assert_different_registers(c_rarg1, addr);
     __ mov(c_rarg1, count);
@@ -112,53 +100,26 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
     __ mov(c_rarg1, count);
   }
   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
-#else
-  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry),
-                  addr, count);
-#endif
   __ pop_call_clobbered_registers(false /* save_fpu */);
+
 }
 
 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
-                                    Register dst, Address src, Register tmp1, Register tmp_thread) {
+                                    Register dst, Address src, Register tmp1) {
   bool on_oop = is_reference_type(type);
   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
   bool on_reference = on_weak || on_phantom;
-  ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
+  ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1);
   if (on_oop && on_reference) {
-    Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
-
-#ifndef _LP64
-    // Work around the x86_32 bug that only manifests with Loom for some reason.
-    // MacroAssembler::resolve_weak_handle calls this barrier with tmp_thread == noreg.
-    if (thread == noreg) {
-      if (dst != rcx && tmp1 != rcx) {
-        thread = rcx;
-      } else if (dst != rdx && tmp1 != rdx) {
-        thread = rdx;
-      } else if (dst != rdi && tmp1 != rdi) {
-        thread = rdi;
-      }
-    }
-    assert_different_registers(dst, tmp1, thread);
-    __ push(thread);
-    __ get_thread(thread);
-#endif
-
     // Generate the G1 pre-barrier code to log the value of
     // the referent field in an SATB buffer.
     g1_write_barrier_pre(masm /* masm */,
                          noreg /* obj */,
                          dst /* pre_val */,
-                         thread /* thread */,
                          tmp1 /* tmp */,
                          true /* tosca_live */,
                          true /* expand_call */);
-
-#ifndef _LP64
-    __ pop(thread);
-#endif
   }
 }
 
@@ -199,7 +160,7 @@ static void generate_pre_barrier_slow_path(MacroAssembler* masm,
                                            Label& runtime) {
   // Do we need to load the previous value?
   if (obj != noreg) {
-    __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
+    __ load_heap_oop(pre_val, Address(obj, 0), noreg, AS_RAW);
   }
   // Is the previous value null?
   __ cmpptr(pre_val, NULL_WORD);
@@ -215,17 +176,14 @@ static void generate_pre_barrier_slow_path(MacroAssembler* masm,
 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
                                                  Register obj,
                                                  Register pre_val,
-                                                 Register thread,
                                                  Register tmp,
                                                  bool tosca_live,
                                                  bool expand_call) {
   // If expand_call is true then we expand the call_VM_leaf macro
   // directly to skip generating the check by
   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
 
-#ifdef _LP64
-  assert(thread == r15_thread, "must be");
-#endif // _LP64
+  const Register thread = r15_thread;
 
   Label done;
   Label runtime;
@@ -260,18 +218,13 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
   // expand_call should be passed true.
 
   if (expand_call) {
-    LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
-#ifdef _LP64
+    assert(pre_val != c_rarg1, "smashed arg");
     if (c_rarg1 != thread) {
       __ mov(c_rarg1, thread);
     }
     if (c_rarg0 != pre_val) {
       __ mov(c_rarg0, pre_val);
     }
-#else
-    __ push(thread);
-    __ push(pre_val);
-#endif
     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), 2);
   } else {
     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
@@ -333,12 +286,9 @@ static void generate_post_barrier_slow_path(MacroAssembler* masm,
 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
                                                   Register store_addr,
                                                   Register new_val,
-                                                  Register thread,
                                                   Register tmp,
                                                   Register tmp2) {
-#ifdef _LP64
-  assert(thread == r15_thread, "must be");
-#endif // _LP64
+  const Register thread = r15_thread;
 
   Label done;
   Label runtime;
@@ -350,7 +300,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
 
   __ bind(runtime);
   // save the live input values
-  RegSet saved = RegSet::of(store_addr NOT_LP64(COMMA thread));
+  RegSet saved = RegSet::of(store_addr);
   __ push_set(saved);
   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), tmp, thread);
   __ pop_set(saved);
@@ -361,7 +311,6 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
 #if defined(COMPILER2)
 
 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
-#ifdef _LP64
   SaveLiveRegisters save_registers(masm, stub);
   if (c_rarg0 != arg) {
     __ mov(c_rarg0, arg);
@@ -373,20 +322,15 @@ static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStub
   // call. If it did not contain any live value, it is free to be used. In
   // either case, it is safe to use it here as a call scratch register.
   __ call(RuntimeAddress(runtime_path), rax);
-#else
-  Unimplemented();
-#endif // _LP64
 }
 
 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
                                                     Register obj,
                                                     Register pre_val,
-                                                    Register thread,
                                                     Register tmp,
                                                     G1PreBarrierStubC2* stub) {
-#ifdef _LP64
-  assert(thread == r15_thread, "must be");
-#endif // _LP64
+  const Register thread = r15_thread;
+
   assert(pre_val != noreg, "check this code");
   if (obj != noreg) {
     assert_different_registers(obj, pre_val, tmp);
@@ -422,14 +366,10 @@ void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
                                                      Register store_addr,
                                                      Register new_val,
-                                                     Register thread,
                                                      Register tmp,
                                                      Register tmp2,
                                                      G1PostBarrierStubC2* stub) {
-#ifdef _LP64
-  assert(thread == r15_thread, "must be");
-#endif // _LP64
-
+  const Register thread = r15_thread;
   stub->initialize_registers(thread, tmp, tmp2);
 
   bool new_val_may_be_null = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
@@ -467,7 +407,6 @@ void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet deco
   bool needs_pre_barrier = as_normal;
   bool needs_post_barrier = val != noreg && in_heap;
 
-  Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
   // flatten object address if needed
   // We do it regardless of precise because we need the registers
   if (dst.index() == noreg && dst.disp() == 0) {
@@ -478,18 +417,10 @@ void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet deco
     __ lea(tmp1, dst);
   }
 
-#ifndef _LP64
-  InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
-#endif
-
-  NOT_LP64(__ get_thread(rcx));
-  NOT_LP64(imasm->save_bcp());
-
   if (needs_pre_barrier) {
     g1_write_barrier_pre(masm /*masm*/,
                          tmp1 /* obj */,
                          tmp2 /* pre_val */,
-                         rthread /* thread */,
                          tmp3  /* tmp */,
                          val != noreg /* tosca_live */,
                          false /* expand_call */);
@@ -510,12 +441,10 @@ void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet deco
       g1_write_barrier_post(masm /*masm*/,
                             tmp1 /* store_adr */,
                             new_val /* new_val */,
-                            rthread /* thread */,
                             tmp3 /* tmp */,
                             tmp2 /* tmp2 */);
     }
   }
-  NOT_LP64(imasm->restore_bcp());
 }
 
 #ifdef COMPILER1
@@ -575,11 +504,9 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
   __ push(rdx);
 
   const Register pre_val = rax;
-  const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
+  const Register thread = r15_thread;
   const Register tmp = rdx;
 
-  NOT_LP64(__ get_thread(thread);)
-
   Address queue_active(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
@@ -641,7 +568,7 @@ void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler*
   // At this point we know new_value is non-null and the new_value crosses regions.
   // Must check to see if card is already dirty
 
-  const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
+  const Register thread = r15_thread;
 
   Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
   Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
@@ -659,8 +586,6 @@ void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler*
   __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base());
   __ addptr(card_addr, cardtable);
 
-  NOT_LP64(__ get_thread(thread);)
-
   __ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val());
   __ jcc(Assembler::equal, done);
 

src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.hpp

@@ -44,15 +44,13 @@ class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
   void g1_write_barrier_pre(MacroAssembler* masm,
                             Register obj,
                             Register pre_val,
-                            Register thread,
                             Register tmp,
                             bool tosca_live,
                             bool expand_call);
 
   void g1_write_barrier_post(MacroAssembler* masm,
                              Register store_addr,
                              Register new_val,
-                             Register thread,
                              Register tmp,
                              Register tmp2);
 
@@ -67,21 +65,19 @@ class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
   void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
 
   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
-                       Register dst, Address src, Register tmp1, Register tmp_thread);
+                       Register dst, Address src, Register tmp1);
 
 #ifdef COMPILER2
   void g1_write_barrier_pre_c2(MacroAssembler* masm,
                                Register obj,
                                Register pre_val,
-                               Register thread,
                                Register tmp,
                                G1PreBarrierStubC2* c2_stub);
   void generate_c2_pre_barrier_stub(MacroAssembler* masm,
                                     G1PreBarrierStubC2* stub) const;
   void g1_write_barrier_post_c2(MacroAssembler* masm,
                                 Register store_addr,
                                 Register new_val,
-                                Register thread,
                                 Register tmp,
                                 Register tmp2,
                                 G1PostBarrierStubC2* c2_stub);

src/hotspot/cpu/x86/gc/g1/g1_x86_64.ad

@@ -52,7 +52,7 @@ static void write_barrier_pre(MacroAssembler* masm,
   for (RegSetIterator<Register> reg = no_preserve.begin(); *reg != noreg; ++reg) {
     stub->dont_preserve(*reg);
   }
-  g1_asm->g1_write_barrier_pre_c2(masm, obj, pre_val, r15_thread, tmp, stub);
+  g1_asm->g1_write_barrier_pre_c2(masm, obj, pre_val, tmp, stub);
 }
 
 static void write_barrier_post(MacroAssembler* masm,
@@ -67,7 +67,7 @@ static void write_barrier_post(MacroAssembler* masm,
   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
   G1BarrierSetAssembler* g1_asm = static_cast<G1BarrierSetAssembler*>(BarrierSet::barrier_set()->barrier_set_assembler());
   G1PostBarrierStubC2* const stub = G1PostBarrierStubC2::create(node);
-  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, r15_thread, tmp1, tmp2, stub);
+  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, tmp1, tmp2, stub);
 }
 
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