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zifeihanRealFYang
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8333154: RISC-V: Add support for primitive array C1 clone intrinsic
Reviewed-by: fyang
1 parent a4c7be8 commit 75220da

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7 files changed

+31
-10
lines changed

7 files changed

+31
-10
lines changed

src/hotspot/cpu/riscv/c1_LIRAssembler_arraycopy_riscv.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -341,7 +341,9 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
341341
__ call_VM_leaf(entry, args_num);
342342
}
343343

344-
__ bind(*stub->continuation());
344+
if (stub != nullptr) {
345+
__ bind(*stub->continuation());
346+
}
345347
}
346348

347349

src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1023,7 +1023,8 @@ void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op) {
10231023
arrayOopDesc::base_offset_in_bytes(op->type()),
10241024
array_element_size(op->type()),
10251025
op->klass()->as_register(),
1026-
*op->stub()->entry());
1026+
*op->stub()->entry(),
1027+
op->zero_array());
10271028
}
10281029
__ bind(*op->stub()->continuation());
10291030
}

src/hotspot/cpu/riscv/c1_LIRGenerator_riscv.cpp

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -733,7 +733,13 @@ void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
733733
assert(x->number_of_arguments() == 5, "wrong type");
734734

735735
// Make all state_for calls early since they can emit code
736-
CodeEmitInfo* info = state_for(x, x->state());
736+
CodeEmitInfo* info = nullptr;
737+
if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
738+
info = state_for(x, x->state_before());
739+
info->set_force_reexecute();
740+
} else {
741+
info = state_for(x, x->state());
742+
}
737743

738744
LIRItem src(x->argument_at(0), this);
739745
LIRItem src_pos(x->argument_at(1), this);
@@ -766,6 +772,9 @@ void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
766772
int flags;
767773
ciArrayKlass* expected_type = nullptr;
768774
arraycopy_helper(x, &flags, &expected_type);
775+
if (x->check_flag(Instruction::OmitChecksFlag)) {
776+
flags = 0;
777+
}
769778

770779
__ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp,
771780
expected_type, flags, info); // does add_safepoint
@@ -844,7 +853,13 @@ void LIRGenerator::do_NewInstance(NewInstance* x) {
844853
}
845854

846855
void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
847-
CodeEmitInfo* info = state_for(x, x->state());
856+
CodeEmitInfo* info = nullptr;
857+
if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
858+
info = state_for(x, x->state_before());
859+
info->set_force_reexecute();
860+
} else {
861+
info = state_for(x, x->state());
862+
}
848863

849864
LIRItem length(x->length(), this);
850865
length.load_item_force(FrameMap::r9_opr);
@@ -861,7 +876,7 @@ void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
861876
__ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
862877

863878
CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
864-
__ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
879+
__ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
865880

866881
LIR_Opr result = rlock_result(x);
867882
__ move(reg, result);

src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -282,7 +282,7 @@ void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register
282282
verify_oop(obj);
283283
}
284284

285-
void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case) {
285+
void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case, bool zero_array) {
286286
assert_different_registers(obj, len, tmp1, tmp2, klass);
287287

288288
// determine alignment mask
@@ -308,7 +308,9 @@ void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1
308308

309309
// clear rest of allocated space
310310
const Register len_zero = len;
311-
initialize_body(obj, arr_size, base_offset, len_zero);
311+
if (zero_array) {
312+
initialize_body(obj, arr_size, base_offset, len_zero);
313+
}
312314

313315
membar(MacroAssembler::StoreStore);
314316

src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.hpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,8 @@ using MacroAssembler::null_check;
101101
// base_offset_in_bytes: offset of first array element, in bytes
102102
// f : element scale factor
103103
// slow_case : exit to slow case implementation if fast allocation fails
104-
void allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case);
104+
// zero_array : zero the allocated array or not
105+
void allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case, bool zero_array);
105106

106107
int rsp_offset() const { return _rsp_offset; }
107108

src/hotspot/share/c1/c1_Compiler.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ bool Compiler::is_intrinsic_supported(vmIntrinsics::ID id) {
235235
case vmIntrinsics::_counterTime:
236236
#endif
237237
case vmIntrinsics::_getObjectSize:
238-
#if defined(X86) || defined(AARCH64) || defined(S390)
238+
#if defined(X86) || defined(AARCH64) || defined(S390) || defined(RISCV)
239239
case vmIntrinsics::_clone:
240240
#endif
241241
break;

src/hotspot/share/c1/c1_LIR.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -351,7 +351,7 @@ LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_
351351
, _tmp(tmp)
352352
, _expected_type(expected_type)
353353
, _flags(flags) {
354-
#if defined(X86) || defined(AARCH64) || defined(S390)
354+
#if defined(X86) || defined(AARCH64) || defined(S390) || defined(RISCV)
355355
if (expected_type != nullptr && flags == 0) {
356356
_stub = nullptr;
357357
} else {

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