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Commit 88c96dd

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Yadong WangRealFYang
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8291947: riscv: fail to build after JDK-8290840
Reviewed-by: fyang, fjiang
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src/hotspot/cpu/riscv/icache_riscv.cpp

Lines changed: 1 addition & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -29,27 +29,8 @@
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#define __ _masm->
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// SYSCALL_RISCV_FLUSH_ICACHE is used to flush instruction cache. The "fence.i" instruction
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// only work on the current hart, so kernel provides the icache flush syscall to flush icache
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// on each hart. You can pass a flag to determine a global or local icache flush.
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static void icache_flush(long int start, long int end)
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{
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const int SYSCALL_RISCV_FLUSH_ICACHE = 259;
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register long int __a7 asm ("a7") = SYSCALL_RISCV_FLUSH_ICACHE;
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register long int __a0 asm ("a0") = start;
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register long int __a1 asm ("a1") = end;
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// the flush can be applied to either all threads or only the current.
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// 0 means a global icache flush, and the icache flush will be applied
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// to other harts concurrently executing.
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register long int __a2 asm ("a2") = 0;
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__asm__ volatile ("ecall\n\t"
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: "+r" (__a0)
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: "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a7)
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: "memory");
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}
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static int icache_flush(address addr, int lines, int magic) {
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icache_flush((long int) addr, (long int) (addr + (lines << ICache::log2_line_size)));
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__builtin___clear_cache(addr, addr + (lines << ICache::log2_line_size));
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return magic;
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}
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