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8333410: [AArch64] Clean unused classes in nativeInst_aarch64.hpp
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Reviewed-by: aph, chagedorn
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@kuaiwei @TheShermanTanker
kuaiwei authored and TheShermanTanker committed Jun 6, 2024
1 parent 6f690a5 commit 8f07853
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Showing 2 changed files with 7 additions and 264 deletions.
107 changes: 0 additions & 107 deletions src/hotspot/cpu/aarch64/nativeInst_aarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -50,113 +50,6 @@ void NativeInstruction::wrote(int offset) {
ICache::invalidate_word(addr_at(offset));
}

void NativeLoadGot::report_and_fail() const {
tty->print_cr("Addr: " INTPTR_FORMAT, p2i(instruction_address()));
fatal("not a indirect rip mov to rbx");
}

void NativeLoadGot::verify() const {
assert(is_adrp_at((address)this), "must be adrp");
}

address NativeLoadGot::got_address() const {
return MacroAssembler::target_addr_for_insn((address)this);
}

intptr_t NativeLoadGot::data() const {
return *(intptr_t *) got_address();
}

address NativePltCall::destination() const {
NativeGotJump* jump = nativeGotJump_at(plt_jump());
return *(address*)MacroAssembler::target_addr_for_insn((address)jump);
}

address NativePltCall::plt_entry() const {
return MacroAssembler::target_addr_for_insn((address)this);
}

address NativePltCall::plt_jump() const {
address entry = plt_entry();
// Virtual PLT code has move instruction first
if (((NativeGotJump*)entry)->is_GotJump()) {
return entry;
} else {
return nativeLoadGot_at(entry)->next_instruction_address();
}
}

address NativePltCall::plt_load_got() const {
address entry = plt_entry();
if (!((NativeGotJump*)entry)->is_GotJump()) {
// Virtual PLT code has move instruction first
return entry;
} else {
// Static PLT code has move instruction second (from c2i stub)
return nativeGotJump_at(entry)->next_instruction_address();
}
}

address NativePltCall::plt_c2i_stub() const {
address entry = plt_load_got();
// This method should be called only for static calls which has C2I stub.
NativeLoadGot* load = nativeLoadGot_at(entry);
return entry;
}

address NativePltCall::plt_resolve_call() const {
NativeGotJump* jump = nativeGotJump_at(plt_jump());
address entry = jump->next_instruction_address();
if (((NativeGotJump*)entry)->is_GotJump()) {
return entry;
} else {
// c2i stub 2 instructions
entry = nativeLoadGot_at(entry)->next_instruction_address();
return nativeGotJump_at(entry)->next_instruction_address();
}
}

void NativePltCall::reset_to_plt_resolve_call() {
set_destination_mt_safe(plt_resolve_call());
}

void NativePltCall::set_destination_mt_safe(address dest) {
// rewriting the value in the GOT, it should always be aligned
NativeGotJump* jump = nativeGotJump_at(plt_jump());
address* got = (address *) jump->got_address();
*got = dest;
}

void NativePltCall::set_stub_to_clean() {
NativeLoadGot* method_loader = nativeLoadGot_at(plt_c2i_stub());
NativeGotJump* jump = nativeGotJump_at(method_loader->next_instruction_address());
method_loader->set_data(0);
jump->set_jump_destination((address)-1);
}

void NativePltCall::verify() const {
assert(NativeCall::is_call_at((address)this), "unexpected code at call site");
}

address NativeGotJump::got_address() const {
return MacroAssembler::target_addr_for_insn((address)this);
}

address NativeGotJump::destination() const {
address *got_entry = (address *) got_address();
return *got_entry;
}

bool NativeGotJump::is_GotJump() const {
NativeInstruction *insn =
nativeInstruction_at(addr_at(3 * NativeInstruction::instruction_size));
return insn->encoding() == 0xd61f0200; // br x16
}

void NativeGotJump::verify() const {
assert(is_adrp_at((address)this), "must be adrp");
}

address NativeCall::destination() const {
address addr = (address)this;
address destination = instruction_address() + displacement();
Expand Down
164 changes: 7 additions & 157 deletions src/hotspot/cpu/aarch64/nativeInst_aarch64.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -39,16 +39,15 @@
// - NativeInstruction
// - - NativeCall
// - - NativeMovConstReg
// - - NativeMovConstRegPatching
// - - NativeMovRegMem
// - - NativeMovRegMemPatching
// - - NativeJump
// - - NativeIllegalOpCode
// - - NativeGeneralJump
// - - NativeReturn
// - - NativeReturnX (return with argument)
// - - NativePushConst
// - - NativeTstRegMem
// - - - NativeGeneralJump
// - - NativeIllegalInstruction
// - - NativeCallTrampolineStub
// - - NativeMembar
// - - NativeLdSt
// - - NativePostCallNop
// - - NativeDeoptInstruction

// The base class for different kinds of native instruction abstractions.
// Provides the primitive operations to manipulate code relative to this.
Expand Down Expand Up @@ -155,44 +154,6 @@ inline NativeInstruction* nativeInstruction_at(uint32_t* address) {
return (NativeInstruction*)address;
}

class NativePltCall: public NativeInstruction {
public:
enum Arm_specific_constants {
instruction_size = 4,
instruction_offset = 0,
displacement_offset = 1,
return_address_offset = 4
};
address instruction_address() const { return addr_at(instruction_offset); }
address next_instruction_address() const { return addr_at(return_address_offset); }
address displacement_address() const { return addr_at(displacement_offset); }
int displacement() const { return (jint) int_at(displacement_offset); }
address return_address() const { return addr_at(return_address_offset); }
address destination() const;
address plt_entry() const;
address plt_jump() const;
address plt_load_got() const;
address plt_resolve_call() const;
address plt_c2i_stub() const;
void set_stub_to_clean();

void reset_to_plt_resolve_call();
void set_destination_mt_safe(address dest);

void verify() const;
};

inline NativePltCall* nativePltCall_at(address address) {
NativePltCall* call = (NativePltCall*)address;
DEBUG_ONLY(call->verify());
return call;
}

inline NativePltCall* nativePltCall_before(address addr) {
address at = addr - NativePltCall::instruction_size;
return nativePltCall_at(at);
}

inline NativeCall* nativeCall_at(address address);
// The NativeCall is an abstraction for accessing/manipulating native
// call instructions (used to manipulate inline caches, primitive &
Expand Down Expand Up @@ -326,15 +287,6 @@ inline NativeMovConstReg* nativeMovConstReg_before(address address) {
return test;
}

class NativeMovConstRegPatching: public NativeMovConstReg {
private:
friend NativeMovConstRegPatching* nativeMovConstRegPatching_at(address address) {
NativeMovConstRegPatching* test = (NativeMovConstRegPatching*)(address - instruction_offset);
DEBUG_ONLY(test->verify());
return test;
}
};

// An interface for accessing/manipulating native moves of the form:
// mov[b/w/l/q] [reg + offset], reg (instruction_code_reg2mem)
// mov[b/w/l/q] reg, [reg+offset] (instruction_code_mem2reg
Expand Down Expand Up @@ -387,60 +339,6 @@ inline NativeMovRegMem* nativeMovRegMem_at(address address) {
return test;
}

class NativeMovRegMemPatching: public NativeMovRegMem {
private:
friend NativeMovRegMemPatching* nativeMovRegMemPatching_at(address address) {
Unimplemented();
return 0;
}
};

// An interface for accessing/manipulating native leal instruction of form:
// leal reg, [reg + offset]

class NativeLoadAddress: public NativeInstruction {
enum AArch64_specific_constants {
instruction_size = 4,
instruction_offset = 0,
data_offset = 0,
next_instruction_offset = 4
};

public:
void verify();
};

// adrp x16, #page
// add x16, x16, #offset
// ldr x16, [x16]
class NativeLoadGot: public NativeInstruction {
public:
enum AArch64_specific_constants {
instruction_length = 4 * NativeInstruction::instruction_size,
offset_offset = 0,
};

address instruction_address() const { return addr_at(0); }
address return_address() const { return addr_at(instruction_length); }
address got_address() const;
address next_instruction_address() const { return return_address(); }
intptr_t data() const;
void set_data(intptr_t data) {
intptr_t* addr = (intptr_t*)got_address();
*addr = data;
}

void verify() const;
private:
void report_and_fail() const;
};

inline NativeLoadGot* nativeLoadGot_at(address addr) {
NativeLoadGot* load = (NativeLoadGot*)addr;
DEBUG_ONLY(load->verify());
return load;
}

class NativeJump: public NativeInstruction {
public:
enum AArch64_specific_constants {
Expand Down Expand Up @@ -496,60 +394,12 @@ inline NativeGeneralJump* nativeGeneralJump_at(address address) {
return jump;
}

class NativeGotJump: public NativeInstruction {
public:
enum AArch64_specific_constants {
instruction_size = 4 * NativeInstruction::instruction_size,
};

void verify() const;
address instruction_address() const { return addr_at(0); }
address destination() const;
address return_address() const { return addr_at(instruction_size); }
address got_address() const;
address next_instruction_address() const { return addr_at(instruction_size); }
bool is_GotJump() const;

void set_jump_destination(address dest) {
address* got = (address*)got_address();
*got = dest;
}
};

inline NativeGotJump* nativeGotJump_at(address addr) {
NativeGotJump* jump = (NativeGotJump*)(addr);
DEBUG_ONLY(jump->verify());
return jump;
}

class NativePopReg : public NativeInstruction {
public:
// Insert a pop instruction
static void insert(address code_pos, Register reg);
};


class NativeIllegalInstruction: public NativeInstruction {
public:
// Insert illegal opcode as specific address
static void insert(address code_pos);
};

// return instruction that does not pop values of the stack
class NativeReturn: public NativeInstruction {
public:
};

// return instruction that does pop values of the stack
class NativeReturnX: public NativeInstruction {
public:
};

// Simple test vs memory
class NativeTstRegMem: public NativeInstruction {
public:
};

inline bool NativeInstruction::is_nop() const{
uint32_t insn = *(uint32_t*)addr_at(0);
return insn == 0xd503201f;
Expand Down

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