Skip to content

Commit 9cac94d

Browse files
asgibbonsSandhya Viswanathan
authored andcommitted
8269404: Base64 Encoding optimization enhancements for x86 using AVX-512
Reviewed-by: kvn, sviswanathan
1 parent ca806ef commit 9cac94d

File tree

5 files changed

+475
-361
lines changed

5 files changed

+475
-361
lines changed

src/hotspot/cpu/x86/assembler_x86.cpp

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3757,6 +3757,15 @@ void Assembler::vpermb(XMMRegister dst, XMMRegister nds, XMMRegister src, int ve
37573757
emit_int16((unsigned char)0x8D, (0xC0 | encode));
37583758
}
37593759

3760+
void Assembler::vpermb(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
3761+
assert(VM_Version::supports_avx512_vbmi(), "");
3762+
InstructionAttr attributes(vector_len, /* rex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
3763+
attributes.set_is_evex_instruction();
3764+
vex_prefix(src, nds->encoding(), dst->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
3765+
emit_int8((unsigned char)0x8D);
3766+
emit_operand(dst, src);
3767+
}
3768+
37603769
void Assembler::vpermw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
37613770
assert(vector_len == AVX_128bit ? VM_Version::supports_avx512vlbw() :
37623771
vector_len == AVX_256bit ? VM_Version::supports_avx512vlbw() :
@@ -3837,6 +3846,14 @@ void Assembler::evpermt2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int
38373846
emit_int16(0x7D, (0xC0 | encode));
38383847
}
38393848

3849+
void Assembler::evpmultishiftqb(XMMRegister dst, XMMRegister ctl, XMMRegister src, int vector_len) {
3850+
assert(VM_Version::supports_avx512_vbmi(), "");
3851+
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
3852+
attributes.set_is_evex_instruction();
3853+
int encode = vex_prefix_and_encode(dst->encoding(), ctl->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
3854+
emit_int16((unsigned char)0x83, (unsigned char)(0xC0 | encode));
3855+
}
3856+
38403857
void Assembler::pause() {
38413858
emit_int16((unsigned char)0xF3, (unsigned char)0x90);
38423859
}
@@ -4135,6 +4152,15 @@ void Assembler::vpmovmskb(Register dst, XMMRegister src, int vec_enc) {
41354152
emit_int16((unsigned char)0xD7, (0xC0 | encode));
41364153
}
41374154

4155+
void Assembler::vpmaskmovd(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
4156+
assert((VM_Version::supports_avx2() && vector_len == AVX_256bit), "");
4157+
InstructionMark im(this);
4158+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ true, /* no_mask_reg */ false, /* uses_vl */ true);
4159+
vex_prefix(src, nds->encoding(), dst->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
4160+
emit_int8((unsigned char)0x8C);
4161+
emit_operand(dst, src);
4162+
}
4163+
41384164
void Assembler::pextrd(Register dst, XMMRegister src, int imm8) {
41394165
assert(VM_Version::supports_sse4_1(), "");
41404166
InstructionAttr attributes(AVX_128bit, /* rex_w */ false, /* legacy_mode */ _legacy_mode_dq, /* no_mask_reg */ true, /* uses_vl */ false);
@@ -6564,6 +6590,13 @@ void Assembler::psubq(XMMRegister dst, XMMRegister src) {
65646590
emit_int8((0xC0 | encode));
65656591
}
65666592

6593+
void Assembler::vpsubusb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
6594+
assert(UseAVX > 0, "requires some form of AVX");
6595+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);
6596+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes);
6597+
emit_int16((unsigned char)0xD8, (0xC0 | encode));
6598+
}
6599+
65676600
void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
65686601
assert(UseAVX > 0, "requires some form of AVX");
65696602
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);
@@ -6655,6 +6688,15 @@ void Assembler::pmuludq(XMMRegister dst, XMMRegister src) {
66556688
emit_int16((unsigned char)0xF4, (0xC0 | encode));
66566689
}
66576690

6691+
void Assembler::vpmulhuw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
6692+
assert((vector_len == AVX_128bit && VM_Version::supports_avx()) ||
6693+
(vector_len == AVX_256bit && VM_Version::supports_avx2()) ||
6694+
(vector_len == AVX_512bit && VM_Version::supports_avx512bw()), "");
6695+
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);
6696+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes);
6697+
emit_int16((unsigned char)0xE4, (0xC0 | encode));
6698+
}
6699+
66586700
void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
66596701
assert(UseAVX > 0, "requires some form of AVX");
66606702
InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);

src/hotspot/cpu/x86/assembler_x86.hpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1688,6 +1688,7 @@ class Assembler : public AbstractAssembler {
16881688
void vpermq(XMMRegister dst, XMMRegister src, int imm8);
16891689
void vpermq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
16901690
void vpermb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1691+
void vpermb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
16911692
void vpermw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
16921693
void vpermd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
16931694
void vpermd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
@@ -1698,6 +1699,7 @@ class Assembler : public AbstractAssembler {
16981699
void vpermpd(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
16991700
void evpermi2q(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
17001701
void evpermt2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1702+
void evpmultishiftqb(XMMRegister dst, XMMRegister ctl, XMMRegister src, int vector_len);
17011703

17021704
void pause();
17031705

@@ -1746,6 +1748,7 @@ class Assembler : public AbstractAssembler {
17461748

17471749
void pmovmskb(Register dst, XMMRegister src);
17481750
void vpmovmskb(Register dst, XMMRegister src, int vec_enc);
1751+
void vpmaskmovd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
17491752

17501753
// SSE 4.1 extract
17511754
void pextrd(Register dst, XMMRegister src, int imm8);
@@ -2248,6 +2251,7 @@ class Assembler : public AbstractAssembler {
22482251
void psubw(XMMRegister dst, XMMRegister src);
22492252
void psubd(XMMRegister dst, XMMRegister src);
22502253
void psubq(XMMRegister dst, XMMRegister src);
2254+
void vpsubusb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
22512255
void vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
22522256
void vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
22532257
void vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
@@ -2268,6 +2272,7 @@ class Assembler : public AbstractAssembler {
22682272
void vpmullw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
22692273
void vpmulld(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
22702274
void vpmullq(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2275+
void vpmulhuw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
22712276

22722277
// Minimum of packed integers
22732278
void pminsb(XMMRegister dst, XMMRegister src);

0 commit comments

Comments
 (0)