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8345609: [C1] LIR Operations with one input should be implemented as LIR_Op1
Reviewed-by: rrich, goetz
1 parent 2382a2d commit a21d21f

10 files changed

+69
-99
lines changed

‎src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp

-2
Original file line numberDiff line numberDiff line change
@@ -777,13 +777,11 @@ void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
777777
}
778778
case vmIntrinsics::_floatToFloat16: {
779779
LIR_Opr tmp = new_register(T_FLOAT);
780-
__ move(LIR_OprFact::floatConst(-0.0), tmp);
781780
__ f2hf(src, dst, tmp);
782781
break;
783782
}
784783
case vmIntrinsics::_float16ToFloat: {
785784
LIR_Opr tmp = new_register(T_FLOAT);
786-
__ move(LIR_OprFact::floatConst(-0.0), tmp);
787785
__ hf2f(src, dst, tmp);
788786
break;
789787
}

‎src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp

-2
Original file line numberDiff line numberDiff line change
@@ -696,8 +696,6 @@ void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
696696
value.load_item();
697697
LIR_Opr dst = rlock_result(x);
698698
LIR_Opr tmp = new_register(T_FLOAT);
699-
// f2hf treats tmp as live_in. Workaround: initialize to some value.
700-
__ move(LIR_OprFact::floatConst(-0.0), tmp); // just to satisfy LinearScan
701699
__ f2hf(value.result(), dst, tmp);
702700
break;
703701
}

‎src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp

-4
Original file line numberDiff line numberDiff line change
@@ -349,11 +349,9 @@ void LIRGenerator::do_NegateOp(NegateOp* x) {
349349
if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
350350
if (x->type()->tag() == doubleTag) {
351351
tmp = new_register(T_DOUBLE);
352-
__ move(LIR_OprFact::doubleConst(-0.0), tmp);
353352
}
354353
else if (x->type()->tag() == floatTag) {
355354
tmp = new_register(T_FLOAT);
356-
__ move(LIR_OprFact::floatConst(-0.0), tmp);
357355
}
358356
}
359357
#endif
@@ -834,12 +832,10 @@ void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
834832
if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
835833
(x->id() == vmIntrinsics::_dabs)) {
836834
tmp = new_register(T_DOUBLE);
837-
__ move(LIR_OprFact::doubleConst(-0.0), tmp);
838835
}
839836
#endif
840837
if (x->id() == vmIntrinsics::_floatToFloat16) {
841838
tmp = new_register(T_FLOAT);
842-
__ move(LIR_OprFact::floatConst(-0.0), tmp);
843839
}
844840

845841
switch(x->id()) {

‎src/hotspot/cpu/x86/c1_LinearScan_x86.cpp

+19-21
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2005, 2023, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -635,6 +635,24 @@ void FpuStackAllocator::handle_op1(LIR_Op1* op1) {
635635
break;
636636
}
637637

638+
case lir_abs:
639+
case lir_sqrt:
640+
case lir_neg: {
641+
assert(in->is_fpu_register(), "must be");
642+
assert(res->is_fpu_register(), "must be");
643+
assert(in->is_last_use(), "old value gets destroyed");
644+
645+
insert_free_if_dead(res, in);
646+
insert_exchange(in);
647+
do_rename(in, res);
648+
649+
new_in = to_fpu_stack_top(res);
650+
new_res = new_in;
651+
652+
op1->set_fpu_stack_size(sim()->stack_size());
653+
break;
654+
}
655+
638656
default: {
639657
assert(!in->is_float_kind() && !res->is_float_kind(), "missed a fpu-operation");
640658
}
@@ -756,26 +774,6 @@ void FpuStackAllocator::handle_op2(LIR_Op2* op2) {
756774
break;
757775
}
758776

759-
case lir_abs:
760-
case lir_sqrt:
761-
case lir_neg: {
762-
// Right argument appears to be unused
763-
assert(right->is_illegal(), "must be");
764-
assert(left->is_fpu_register(), "must be");
765-
assert(res->is_fpu_register(), "must be");
766-
assert(left->is_last_use(), "old value gets destroyed");
767-
768-
insert_free_if_dead(res, left);
769-
insert_exchange(left);
770-
do_rename(left, res);
771-
772-
new_left = to_fpu_stack_top(res);
773-
new_res = new_left;
774-
775-
op2->set_fpu_stack_size(sim()->stack_size());
776-
break;
777-
}
778-
779777
default: {
780778
assert(false, "missed a fpu-operation");
781779
}

‎src/hotspot/cpu/x86/c1_LinearScan_x86.hpp

+2-30
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -66,35 +66,7 @@ inline bool LinearScan::is_caller_save(int assigned_reg) {
6666

6767

6868
inline void LinearScan::pd_add_temps(LIR_Op* op) {
69-
switch (op->code()) {
70-
case lir_tan: {
71-
// The slow path for these functions may need to save and
72-
// restore all live registers but we don't want to save and
73-
// restore everything all the time, so mark the xmms as being
74-
// killed. If the slow path were explicit or we could propagate
75-
// live register masks down to the assembly we could do better
76-
// but we don't have any easy way to do that right now. We
77-
// could also consider not killing all xmm registers if we
78-
// assume that slow paths are uncommon but it's not clear that
79-
// would be a good idea.
80-
if (UseSSE > 0) {
81-
#ifdef ASSERT
82-
if (TraceLinearScanLevel >= 2) {
83-
tty->print_cr("killing XMMs for trig");
84-
}
85-
#endif
86-
int num_caller_save_xmm_regs = FrameMap::get_num_caller_save_xmms();
87-
int op_id = op->id();
88-
for (int xmm = 0; xmm < num_caller_save_xmm_regs; xmm++) {
89-
LIR_Opr opr = FrameMap::caller_save_xmm_reg_at(xmm);
90-
add_temp(reg_num(opr), op_id, noUse, T_ILLEGAL);
91-
}
92-
}
93-
break;
94-
}
95-
default:
96-
break;
97-
}
69+
// No special case behaviours yet
9870
}
9971

10072

‎src/hotspot/share/c1/c1_LIR.cpp

+13-10
Original file line numberDiff line numberDiff line change
@@ -452,12 +452,18 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
452452
case lir_monaddr: // input and result always valid, info always invalid
453453
case lir_null_check: // input and info always valid, result always invalid
454454
case lir_move: // input and result always valid, may have info
455+
case lir_sqrt: // FP Ops have no info, but input and result
456+
case lir_abs:
457+
case lir_neg:
458+
case lir_f2hf:
459+
case lir_hf2f:
455460
{
456461
assert(op->as_Op1() != nullptr, "must be");
457462
LIR_Op1* op1 = (LIR_Op1*)op;
458463

459464
if (op1->_info) do_info(op1->_info);
460465
if (op1->_opr->is_valid()) do_input(op1->_opr);
466+
if (op1->_tmp->is_valid()) do_temp(op1->_tmp);
461467
if (op1->_result->is_valid()) do_output(op1->_result);
462468

463469
break;
@@ -483,6 +489,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
483489

484490
assert(op1->_info != nullptr, ""); do_info(op1->_info);
485491
if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
492+
assert(op1->_tmp->is_illegal(), "not used");
486493
assert(op1->_result->is_illegal(), "safepoint does not produce value");
487494

488495
break;
@@ -566,11 +573,6 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
566573
case lir_add:
567574
case lir_sub:
568575
case lir_rem:
569-
case lir_sqrt:
570-
case lir_abs:
571-
case lir_neg:
572-
case lir_f2hf:
573-
case lir_hf2f:
574576
case lir_logic_and:
575577
case lir_logic_or:
576578
case lir_logic_xor:
@@ -667,6 +669,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
667669

668670
assert(op1->_info == nullptr, "no info");
669671
assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
672+
assert(op1->_tmp->is_illegal(), "not used");
670673
assert(op1->_result->is_illegal(), "no result");
671674

672675
break;
@@ -1730,6 +1733,11 @@ const char * LIR_Op::name() const {
17301733
case lir_cond_float_branch: s = "flt_cond_br"; break;
17311734
case lir_move: s = "move"; break;
17321735
case lir_roundfp: s = "roundfp"; break;
1736+
case lir_abs: s = "abs"; break;
1737+
case lir_neg: s = "neg"; break;
1738+
case lir_sqrt: s = "sqrt"; break;
1739+
case lir_f2hf: s = "f2hf"; break;
1740+
case lir_hf2f: s = "hf2f"; break;
17331741
case lir_rtcall: s = "rtcall"; break;
17341742
case lir_throw: s = "throw"; break;
17351743
case lir_unwind: s = "unwind"; break;
@@ -1746,11 +1754,6 @@ const char * LIR_Op::name() const {
17461754
case lir_mul: s = "mul"; break;
17471755
case lir_div: s = "div"; break;
17481756
case lir_rem: s = "rem"; break;
1749-
case lir_abs: s = "abs"; break;
1750-
case lir_neg: s = "neg"; break;
1751-
case lir_sqrt: s = "sqrt"; break;
1752-
case lir_f2hf: s = "f2hf"; break;
1753-
case lir_hf2f: s = "hf2f"; break;
17541757
case lir_logic_and: s = "logic_and"; break;
17551758
case lir_logic_or: s = "logic_or"; break;
17561759
case lir_logic_xor: s = "logic_xor"; break;

‎src/hotspot/share/c1/c1_LIR.hpp

+22-14
Original file line numberDiff line numberDiff line change
@@ -939,6 +939,11 @@ enum LIR_Code {
939939
, lir_alloc_object
940940
, lir_monaddr
941941
, lir_roundfp
942+
, lir_sqrt
943+
, lir_abs
944+
, lir_neg
945+
, lir_f2hf
946+
, lir_hf2f
942947
, lir_safepoint
943948
, lir_unwind
944949
, lir_load_klass
@@ -955,13 +960,6 @@ enum LIR_Code {
955960
, lir_mul
956961
, lir_div
957962
, lir_rem
958-
, lir_sqrt
959-
, lir_abs
960-
, lir_neg
961-
, lir_tan
962-
, lir_f2hf
963-
, lir_hf2f
964-
, lir_log10
965963
, lir_logic_and
966964
, lir_logic_or
967965
, lir_logic_xor
@@ -1357,6 +1355,7 @@ class LIR_Op1: public LIR_Op {
13571355

13581356
protected:
13591357
LIR_Opr _opr; // input operand
1358+
LIR_Opr _tmp;
13601359
BasicType _type; // Operand types
13611360
LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
13621361

@@ -1371,12 +1370,21 @@ class LIR_Op1: public LIR_Op {
13711370
LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = nullptr)
13721371
: LIR_Op(code, result, info)
13731372
, _opr(opr)
1373+
, _tmp(LIR_OprFact::illegalOpr)
1374+
, _type(type)
1375+
, _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1376+
1377+
LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, LIR_Opr tmp, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = nullptr)
1378+
: LIR_Op(code, result, info)
1379+
, _opr(opr)
1380+
, _tmp(tmp)
13741381
, _type(type)
13751382
, _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
13761383

13771384
LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
13781385
: LIR_Op(code, result, info)
13791386
, _opr(opr)
1387+
, _tmp(LIR_OprFact::illegalOpr)
13801388
, _type(type)
13811389
, _patch(patch) {
13821390
assert(code == lir_move, "must be");
@@ -1386,10 +1394,12 @@ class LIR_Op1: public LIR_Op {
13861394
LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
13871395
: LIR_Op(code, LIR_OprFact::illegalOpr, info)
13881396
, _opr(opr)
1397+
, _tmp(LIR_OprFact::illegalOpr)
13891398
, _type(T_ILLEGAL)
13901399
, _patch(lir_patch_none) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
13911400

13921401
LIR_Opr in_opr() const { return _opr; }
1402+
LIR_Opr tmp_opr() const { return _tmp; }
13931403
LIR_PatchCode patch_code() const { return _patch; }
13941404
BasicType type() const { return _type; }
13951405

@@ -2272,15 +2282,13 @@ class LIR_List: public CompilationResourceObj {
22722282
void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
22732283
LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
22742284

2275-
void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2276-
void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }
2277-
void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2285+
void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op1(lir_abs , from, to, tmp)); }
2286+
void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op1(lir_neg, from, to, tmp)); }
2287+
void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op1(lir_sqrt, from, to, tmp)); }
22782288
void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
22792289
void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2280-
void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2281-
void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2282-
void f2hf(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_f2hf, from, tmp, to)); }
2283-
void hf2f(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_hf2f, from, tmp, to)); }
2290+
void f2hf(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op1(lir_f2hf, from, to, tmp)); }
2291+
void hf2f(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op1(lir_hf2f, from, to, tmp)); }
22842292

22852293
void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
22862294
void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = nullptr) { append(new LIR_Op2(lir_sub, left, right, res, info)); }

‎src/hotspot/share/c1/c1_LIRAssembler.cpp

+11-13
Original file line numberDiff line numberDiff line change
@@ -527,6 +527,17 @@ void LIR_Assembler::emit_op1(LIR_Op1* op) {
527527
break;
528528
}
529529

530+
case lir_abs:
531+
case lir_sqrt:
532+
case lir_f2hf:
533+
case lir_hf2f:
534+
intrinsic_op(op->code(), op->in_opr(), op->tmp_opr(), op->result_opr(), op);
535+
break;
536+
537+
case lir_neg:
538+
negate(op->in_opr(), op->result_opr(), op->tmp_opr());
539+
break;
540+
530541
case lir_return: {
531542
assert(op->as_OpReturn() != nullptr, "sanity");
532543
LIR_OpReturn *ret_op = (LIR_OpReturn*)op;
@@ -724,19 +735,6 @@ void LIR_Assembler::emit_op2(LIR_Op2* op) {
724735
op->fpu_pop_count() == 1);
725736
break;
726737

727-
case lir_abs:
728-
case lir_sqrt:
729-
case lir_tan:
730-
case lir_log10:
731-
case lir_f2hf:
732-
case lir_hf2f:
733-
intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
734-
break;
735-
736-
case lir_neg:
737-
negate(op->in_opr1(), op->result_opr(), op->in_opr2());
738-
break;
739-
740738
case lir_logic_and:
741739
case lir_logic_or:
742740
case lir_logic_xor:

‎src/hotspot/share/c1/c1_LIRAssembler.hpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2000, 2024, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -208,7 +208,7 @@ class LIR_Assembler: public CompilationResourceObj {
208208

209209
void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
210210
void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
211-
void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
211+
void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr temp, LIR_Opr dest, LIR_Op* op);
212212
#ifdef ASSERT
213213
void emit_assert(LIR_OpAssert* op);
214214
#endif

‎src/hotspot/share/c1/c1_LinearScan.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -6739,7 +6739,6 @@ void LinearScanStatistic::collect(LinearScan* allocator) {
67396739
case lir_abs:
67406740
case lir_f2hf:
67416741
case lir_hf2f:
6742-
case lir_log10:
67436742
case lir_logic_and:
67446743
case lir_logic_or:
67456744
case lir_logic_xor:

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