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Yadong WangRealFYang
Yadong Wang
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8308765: RISC-V: Expand size of stub routines for zgc only
Reviewed-by: fjiang, fyang
1 parent 4aea7da commit d66b6d8

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3 files changed

+9
-9
lines changed

3 files changed

+9
-9
lines changed

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -758,8 +758,8 @@ void MacroAssembler::la(Register Rd, Label &label) {
758758
wrap_label(Rd, label, &MacroAssembler::la);
759759
}
760760

761-
void MacroAssembler::li16u(Register Rd, int32_t imm) {
762-
lui(Rd, imm << 12);
761+
void MacroAssembler::li16u(Register Rd, uint16_t imm) {
762+
lui(Rd, (uint32_t)imm << 12);
763763
srli(Rd, Rd, 12);
764764
}
765765

@@ -1412,8 +1412,8 @@ static int patch_imm_in_li64(address branch, address target) {
14121412
return LI64_INSTRUCTIONS_NUM * NativeInstruction::instruction_size;
14131413
}
14141414

1415-
static int patch_imm_in_li16u(address branch, int32_t target) {
1416-
Assembler::patch(branch, 31, 12, target & 0xfffff); // patch lui only
1415+
static int patch_imm_in_li16u(address branch, uint16_t target) {
1416+
Assembler::patch(branch, 31, 12, target); // patch lui only
14171417
return NativeInstruction::instruction_size;
14181418
}
14191419

@@ -1508,7 +1508,7 @@ int MacroAssembler::pd_patch_instruction_size(address branch, address target) {
15081508
return patch_imm_in_li32(branch, (int32_t)imm);
15091509
} else if (NativeInstruction::is_li16u_at(branch)) {
15101510
int64_t imm = (intptr_t)target;
1511-
return patch_imm_in_li16u(branch, (int32_t)imm);
1511+
return patch_imm_in_li16u(branch, (uint16_t)imm);
15121512
} else {
15131513
#ifdef ASSERT
15141514
tty->print_cr("pd_patch_instruction_size: instruction 0x%x at " INTPTR_FORMAT " could not be patched!\n",

src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -693,7 +693,7 @@ class MacroAssembler: public Assembler {
693693
void la(Register Rd, const address dest);
694694
void la(Register Rd, const Address &adr);
695695

696-
void li16u(Register Rd, int32_t imm);
696+
void li16u(Register Rd, uint16_t imm);
697697
void li32(Register Rd, int32_t imm);
698698
void li64(Register Rd, int64_t imm);
699699
void li (Register Rd, int64_t imm); // optimized load immediate

src/hotspot/cpu/riscv/stubRoutines_riscv.hpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -37,10 +37,10 @@ static bool returns_to_call_stub(address return_pc) {
3737

3838
enum platform_dependent_constants {
3939
// simply increase sizes if too small (assembler will crash if too small)
40-
_initial_stubs_code_size = 19000,
40+
_initial_stubs_code_size = 10000,
4141
_continuation_stubs_code_size = 2000,
42-
_compiler_stubs_code_size = 128000,
43-
_final_stubs_code_size = 128000
42+
_compiler_stubs_code_size = 15000 ZGC_ONLY(+5000),
43+
_final_stubs_code_size = 20000 ZGC_ONLY(+10000)
4444
};
4545

4646
class riscv {

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