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RealFYangRealFYang
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8294430: RISC-V: Small refactoring for movptr_with_offset
Reviewed-by: fjiang, yadongwang, shade
1 parent 9d76ac8 commit d827fd8

10 files changed

+26
-28
lines changed

‎src/hotspot/cpu/riscv/assembler_riscv.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -164,7 +164,7 @@ void Assembler::li32(Register Rd, int32_t imm) {
164164
} else { \
165165
assert(temp != noreg, "temp must not be empty register!"); \
166166
int32_t offset = 0; \
167-
movptr_with_offset(temp, dest, offset); \
167+
movptr(temp, dest, offset); \
168168
jalr(REGISTER, temp, offset); \
169169
} \
170170
} \
@@ -201,7 +201,7 @@ void Assembler::ret() {
201201
jalr(REGISTER, temp, ((int32_t)distance << 20) >> 20); \
202202
} else { \
203203
int32_t offset = 0; \
204-
movptr_with_offset(temp, dest, offset); \
204+
movptr(temp, dest, offset); \
205205
jalr(REGISTER, temp, offset); \
206206
} \
207207
}
@@ -272,7 +272,7 @@ void Assembler::wrap_label(Register Rt, Label &L, jal_jalr_insn insn) {
272272
}
273273
}
274274

275-
void Assembler::movptr_with_offset(Register Rd, address addr, int32_t &offset) {
275+
void Assembler::movptr(Register Rd, address addr, int32_t &offset) {
276276
int64_t imm64 = (int64_t)addr;
277277
#ifndef PRODUCT
278278
{
@@ -307,7 +307,7 @@ void Assembler::movptr(Register Rd, uintptr_t imm64) {
307307

308308
void Assembler::movptr(Register Rd, address addr) {
309309
int offset = 0;
310-
movptr_with_offset(Rd, addr, offset);
310+
movptr(Rd, addr, offset);
311311
addi(Rd, Rd, offset);
312312
}
313313

‎src/hotspot/cpu/riscv/assembler_riscv.hpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -302,7 +302,7 @@ class Assembler : public AbstractAssembler {
302302
lui(Rd, upper);
303303
offset = lower;
304304
} else {
305-
movptr_with_offset(Rd, (address)(uintptr_t)adr.offset(), offset);
305+
movptr(Rd, (address)(uintptr_t)adr.offset(), offset);
306306
}
307307
add(Rd, Rd, adr.base());
308308
}
@@ -321,7 +321,7 @@ class Assembler : public AbstractAssembler {
321321
void li32(Register Rd, int32_t imm);
322322
void li64(Register Rd, int64_t imm);
323323
void movptr(Register Rd, address addr);
324-
void movptr_with_offset(Register Rd, address addr, int32_t &offset);
324+
void movptr(Register Rd, address addr, int32_t &offset);
325325
void movptr(Register Rd, uintptr_t imm64);
326326
void j(const address &dest, Register temp = t0);
327327
void j(const Address &adr, Register temp = t0);
@@ -523,7 +523,7 @@ class Assembler : public AbstractAssembler {
523523
NAME(Rd, Rd, ((int32_t)distance << 20) >> 20); \
524524
} else { \
525525
int32_t offset = 0; \
526-
movptr_with_offset(Rd, dest, offset); \
526+
movptr(Rd, dest, offset); \
527527
NAME(Rd, Rd, offset); \
528528
} \
529529
} \
@@ -597,7 +597,7 @@ class Assembler : public AbstractAssembler {
597597
NAME(Rd, temp, ((int32_t)distance << 20) >> 20); \
598598
} else { \
599599
int32_t offset = 0; \
600-
movptr_with_offset(temp, dest, offset); \
600+
movptr(temp, dest, offset); \
601601
NAME(Rd, temp, offset); \
602602
} \
603603
} \
@@ -742,7 +742,7 @@ class Assembler : public AbstractAssembler {
742742
NAME(Rs, temp, ((int32_t)distance << 20) >> 20); \
743743
} else { \
744744
int32_t offset = 0; \
745-
movptr_with_offset(temp, dest, offset); \
745+
movptr(temp, dest, offset); \
746746
NAME(Rs, temp, offset); \
747747
} \
748748
} \
@@ -786,7 +786,7 @@ class Assembler : public AbstractAssembler {
786786
NAME(Rs, temp, ((int32_t)distance << 20) >> 20); \
787787
} else { \
788788
int32_t offset = 0; \
789-
movptr_with_offset(temp, dest, offset); \
789+
movptr(temp, dest, offset); \
790790
NAME(Rs, temp, offset); \
791791
} \
792792
} \
@@ -881,7 +881,7 @@ class Assembler : public AbstractAssembler {
881881
} else { \
882882
assert_different_registers(Rd, temp); \
883883
int32_t off = 0; \
884-
movptr_with_offset(temp, dest, off); \
884+
movptr(temp, dest, off); \
885885
jalr(Rd, temp, off); \
886886
} \
887887
} \

‎src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -248,9 +248,9 @@ void C2_MacroAssembler::emit_entry_barrier_stub(C2EntryBarrierStub* stub) {
248248

249249
bind(stub->slow_path());
250250

251-
int32_t _offset = 0;
252-
movptr_with_offset(t0, StubRoutines::riscv::method_entry_barrier(), _offset);
253-
jalr(ra, t0, _offset);
251+
int32_t offset = 0;
252+
movptr(t0, StubRoutines::riscv::method_entry_barrier(), offset);
253+
jalr(ra, t0, offset);
254254
j(stub->continuation());
255255

256256
bind(stub->guard());

‎src/hotspot/cpu/riscv/gc/shared/barrierSetAssembler_riscv.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -256,7 +256,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm, Label* slo
256256
__ beq(t0, t1, skip_barrier);
257257

258258
int32_t offset = 0;
259-
__ movptr_with_offset(t0, StubRoutines::riscv::method_entry_barrier(), offset);
259+
__ movptr(t0, StubRoutines::riscv::method_entry_barrier(), offset);
260260
__ jalr(ra, t0, offset);
261261
__ j(skip_barrier);
262262

‎src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -556,7 +556,7 @@ void MacroAssembler::emit_static_call_stub() {
556556

557557
// Jump to the entry point of the i2c stub.
558558
int32_t offset = 0;
559-
movptr_with_offset(t0, 0, offset);
559+
movptr(t0, 0, offset);
560560
jalr(x0, t0, offset);
561561
}
562562

@@ -565,7 +565,7 @@ void MacroAssembler::call_VM_leaf_base(address entry_point,
565565
Label *retaddr) {
566566
int32_t offset = 0;
567567
push_reg(RegSet::of(t0, xmethod), sp); // push << t0 & xmethod >> to sp
568-
movptr_with_offset(t0, entry_point, offset);
568+
movptr(t0, entry_point, offset);
569569
jalr(x1, t0, offset);
570570
if (retaddr != NULL) {
571571
bind(*retaddr);
@@ -2689,7 +2689,6 @@ void MacroAssembler::load_byte_map_base(Register reg) {
26892689
}
26902690

26912691
void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &offset) {
2692-
relocInfo::relocType rtype = dest.rspec().reloc()->type();
26932692
unsigned long low_address = (uintptr_t)CodeCache::low_bound();
26942693
unsigned long high_address = (uintptr_t)CodeCache::high_bound();
26952694
unsigned long dest_address = (uintptr_t)dest.target();
@@ -2709,7 +2708,7 @@ void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &o
27092708
auipc(reg1, (int32_t)distance + 0x800);
27102709
offset = ((int32_t)distance << 20) >> 20;
27112710
} else {
2712-
movptr_with_offset(reg1, dest.target(), offset);
2711+
movptr(reg1, dest.target(), offset);
27132712
}
27142713
}
27152714

‎src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -683,7 +683,7 @@ class MacroAssembler: public Assembler {
683683
// code is patched, and the new destination may not be reachable by a simple JAL
684684
// instruction.
685685
//
686-
// - indirect call: movptr_with_offset + jalr
686+
// - indirect call: movptr + jalr
687687
// This too can reach anywhere in the address space, but it cannot be
688688
// patched while code is running, so it must only be modified at a safepoint.
689689
// This form of call is most suitable for targets at fixed addresses, which

‎src/hotspot/cpu/riscv/nativeInst_riscv.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -280,7 +280,7 @@ address NativeJump::jump_destination() const {
280280

281281
// We use jump to self as the unresolved address which the inline
282282
// cache code (and relocs) know about
283-
// As a special case we also use sequence movptr_with_offset(r,0), jalr(r,0)
283+
// As a special case we also use sequence movptr(r,0), jalr(r,0)
284284
// i.e. jump to 0 when we need leave space for a wide immediate
285285
// load
286286

@@ -392,7 +392,7 @@ void NativeGeneralJump::insert_unconditional(address code_pos, address entry) {
392392
MacroAssembler a(&cb);
393393

394394
int32_t offset = 0;
395-
a.movptr_with_offset(t0, entry, offset); // lui, addi, slli, addi, slli
395+
a.movptr(t0, entry, offset); // lui, addi, slli, addi, slli
396396
a.jalr(x0, t0, offset); // jalr
397397

398398
ICache::invalidate_range(code_pos, instruction_size);

‎src/hotspot/cpu/riscv/nativeInst_riscv.hpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -328,7 +328,6 @@ class NativeMovConstReg: public NativeInstruction {
328328
public:
329329
enum RISCV_specific_constants {
330330
movptr_instruction_size = 6 * NativeInstruction::instruction_size, // lui, addi, slli, addi, slli, addi. See movptr().
331-
movptr_with_offset_instruction_size = 5 * NativeInstruction::instruction_size, // lui, addi, slli, addi, slli. See movptr_with_offset().
332331
load_pc_relative_instruction_size = 2 * NativeInstruction::instruction_size, // auipc, ld
333332
instruction_offset = 0,
334333
displacement_offset = 0
@@ -342,12 +341,12 @@ class NativeMovConstReg: public NativeInstruction {
342341
// However, when the instruction at 5 * instruction_size isn't addi,
343342
// the next instruction address should be addr_at(5 * instruction_size)
344343
if (nativeInstruction_at(instruction_address())->is_movptr()) {
345-
if (is_addi_at(addr_at(movptr_with_offset_instruction_size))) {
344+
if (is_addi_at(addr_at(movptr_instruction_size - NativeInstruction::instruction_size))) {
346345
// Assume: lui, addi, slli, addi, slli, addi
347346
return addr_at(movptr_instruction_size);
348347
} else {
349348
// Assume: lui, addi, slli, addi, slli
350-
return addr_at(movptr_with_offset_instruction_size);
349+
return addr_at(movptr_instruction_size - NativeInstruction::instruction_size);
351350
}
352351
} else if (is_load_pc_relative_at(instruction_address())) {
353352
// Assume: auipc, ld

‎src/hotspot/cpu/riscv/stubGenerator_riscv.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -652,7 +652,7 @@ class StubGenerator: public StubCodeGenerator {
652652
#endif
653653
BLOCK_COMMENT("call MacroAssembler::debug");
654654
int32_t offset = 0;
655-
__ movptr_with_offset(t0, CAST_FROM_FN_PTR(address, MacroAssembler::debug64), offset);
655+
__ movptr(t0, CAST_FROM_FN_PTR(address, MacroAssembler::debug64), offset);
656656
__ jalr(x1, t0, offset);
657657
__ ebreak();
658658

@@ -3741,7 +3741,7 @@ class StubGenerator: public StubCodeGenerator {
37413741
__ mv(c_rarg0, xthread);
37423742
BLOCK_COMMENT("call runtime_entry");
37433743
int32_t offset = 0;
3744-
__ movptr_with_offset(t0, runtime_entry, offset);
3744+
__ movptr(t0, runtime_entry, offset);
37453745
__ jalr(x1, t0, offset);
37463746

37473747
// Generate oop map

‎src/hotspot/cpu/riscv/templateTable_riscv.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -387,7 +387,7 @@ void TemplateTable::fast_aldc(bool wide) {
387387

388388
// Stash null_sentinel address to get its value later
389389
int32_t offset = 0;
390-
__ movptr_with_offset(rarg, Universe::the_null_sentinel_addr(), offset);
390+
__ movptr(rarg, Universe::the_null_sentinel_addr(), offset);
391391
__ ld(tmp, Address(rarg, offset));
392392
__ resolve_oop_handle(tmp, x15, t1);
393393
__ bne(result, tmp, notNull);

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