Skip to content
Permalink
Browse files
8269672: C1: Remove unaligned move on all architectures
Co-authored-by: Martin Doerr <mdoerr@openjdk.org>
Reviewed-by: thartmann
  • Loading branch information
Yi Yang and TheRealMDoerr committed Jul 6, 2021
1 parent 2926769 commit df0e11bb0cadf0f8489118a18e56ff3370ea3ae5
@@ -784,7 +784,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool po
}


void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide, bool /* unaligned */) {
void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
LIR_Address* to_addr = dest->as_address_ptr();
PatchingStub* patch = NULL;
Register compressed_src = rscratch1;
@@ -941,7 +941,7 @@ void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type) {
}


void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool /* unaligned */) {
void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
LIR_Address* addr = src->as_address_ptr();
LIR_Address* from_addr = src->as_address_ptr();

@@ -2907,7 +2907,7 @@ void LIR_Assembler::rt_call(LIR_Opr result, address dest, const LIR_OprList* arg
void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
if (dest->is_address() || src->is_address()) {
move_op(src, dest, type, lir_patch_none, info,
/*pop_fpu_stack*/false, /*unaligned*/false, /*wide*/false);
/*pop_fpu_stack*/false, /*wide*/false);
} else {
ShouldNotReachHere();
}
@@ -343,7 +343,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}
__ cbz(pre_val_reg, *stub->continuation());
ce->store_parameter(stub->pre_val()->as_register(), 0);
@@ -613,7 +613,7 @@ void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, Shen
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}
__ cbz(pre_val_reg, *stub->continuation());
ce->store_parameter(stub->pre_val()->as_register(), 0);
@@ -494,8 +494,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool po

void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info,
bool pop_fpu_stack, bool wide,
bool unaligned) {
bool pop_fpu_stack, bool wide) {
LIR_Address* to_addr = dest->as_address_ptr();
Register base_reg = to_addr->base()->as_pointer_register();
const bool needs_patching = (patch_code != lir_patch_none);
@@ -695,7 +694,7 @@ void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type) {

void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info,
bool wide, bool unaligned) {
bool wide) {
assert(src->is_address(), "should not call otherwise");
assert(dest->is_register(), "should not call otherwise");
LIR_Address* addr = src->as_address_ptr();
@@ -332,7 +332,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ cbz(pre_val_reg, *stub->continuation());
@@ -714,7 +714,7 @@ void LIR_Assembler::explicit_null_check(Register addr, CodeEmitInfo* info) {


// Attention: caller must encode oop if needed
int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned) {
int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide) {
int store_offset;
if (!Assembler::is_simm16(offset)) {
// For offsets larger than a simm16 we setup the offset.
@@ -794,7 +794,7 @@ int LIR_Assembler::store(LIR_Opr from_reg, Register base, Register disp, BasicTy
}


int LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned) {
int LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide) {
int load_offset;
if (!Assembler::is_simm16(offset)) {
// For offsets larger than a simm16 we setup the offset.
@@ -965,7 +965,7 @@ void LIR_Assembler::const2mem(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmi
offset = store(tmp, base, addr->index()->as_pointer_register(), type, wide);
} else {
assert(Assembler::is_simm16(addr->disp()), "can't handle larger addresses");
offset = store(tmp, base, addr->disp(), type, wide, false);
offset = store(tmp, base, addr->disp(), type, wide);
}

if (info != NULL) {
@@ -1120,7 +1120,7 @@ Address LIR_Assembler::as_Address_lo(LIR_Address* addr) {


void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool unaligned) {
LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {

assert(type != T_METADATA, "load of metadata ptr not supported");
LIR_Address* addr = src_opr->as_address_ptr();
@@ -1170,7 +1170,7 @@ void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type,

if (disp_reg == noreg) {
assert(Assembler::is_simm16(disp_value), "should have set this up");
offset = load(src, disp_value, to_reg, type, wide, unaligned);
offset = load(src, disp_value, to_reg, type, wide);
} else {
offset = load(src, disp_reg, to_reg, type, wide);
}
@@ -1192,8 +1192,7 @@ void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) {
addr = frame_map()->address_for_double_slot(src->double_stack_ix());
}

bool unaligned = addr.disp() % 8 != 0;
load(addr.base(), addr.disp(), dest, dest->type(), true /*wide*/, unaligned);
load(addr.base(), addr.disp(), dest, dest->type(), true /*wide*/);
}


@@ -1204,8 +1203,8 @@ void LIR_Assembler::reg2stack(LIR_Opr from_reg, LIR_Opr dest, BasicType type, bo
} else if (dest->is_double_word()) {
addr = frame_map()->address_for_slot(dest->double_stack_ix());
}
bool unaligned = addr.disp() % 8 != 0;
store(from_reg, addr.base(), addr.disp(), from_reg->type(), true /*wide*/, unaligned);

store(from_reg, addr.base(), addr.disp(), from_reg->type(), true /*wide*/);
}


@@ -1241,7 +1240,7 @@ void LIR_Assembler::reg2reg(LIR_Opr from_reg, LIR_Opr to_reg) {

void LIR_Assembler::reg2mem(LIR_Opr from_reg, LIR_Opr dest, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack,
bool wide, bool unaligned) {
bool wide) {
assert(type != T_METADATA, "store of metadata ptr not supported");
LIR_Address* addr = dest->as_address_ptr();

@@ -1298,7 +1297,7 @@ void LIR_Assembler::reg2mem(LIR_Opr from_reg, LIR_Opr dest, BasicType type,

if (disp_reg == noreg) {
assert(Assembler::is_simm16(disp_value), "should have set this up");
offset = store(from_reg, src, disp_value, type, wide, unaligned);
offset = store(from_reg, src, disp_value, type, wide);
} else {
offset = store(from_reg, src, disp_reg, type, wide);
}
@@ -38,10 +38,10 @@

void explicit_null_check(Register addr, CodeEmitInfo* info);

int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned);
int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide);
int store(LIR_Opr from_reg, Register base, Register disp, BasicType type, bool wide);

int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned);
int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide);
int load(Register base, Register disp, LIR_Opr to_reg, BasicType type, bool wide);

int shift_amount(BasicType t);
@@ -309,12 +309,7 @@ bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result
void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
BasicType t = item->type();
LIR_Opr sp_opr = FrameMap::SP_opr;
if ((t == T_LONG || t == T_DOUBLE) &&
(in_bytes(offset_from_sp) % 8 != 0)) {
__ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
} else {
__ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
}
__ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
}


@@ -393,7 +393,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ cmpdi(CCR0, pre_val_reg, 0);
@@ -879,7 +879,7 @@ Address LIR_Assembler::as_Address_lo(LIR_Address* addr) {
}

void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code,
CodeEmitInfo* info, bool wide, bool unaligned) {
CodeEmitInfo* info, bool wide) {

assert(type != T_METADATA, "load of metadata ptr not supported");
LIR_Address* addr = src_opr->as_address_ptr();
@@ -1079,7 +1079,7 @@ void LIR_Assembler::reg2reg(LIR_Opr from_reg, LIR_Opr to_reg) {

void LIR_Assembler::reg2mem(LIR_Opr from, LIR_Opr dest_opr, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack,
bool wide, bool unaligned) {
bool wide) {
assert(type != T_METADATA, "store of metadata ptr not supported");
LIR_Address* addr = dest_opr->as_address_ptr();

@@ -427,7 +427,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ z_ltgr(Z_R1_scratch, pre_val_reg); // Pass oop in Z_R1_scratch to Runtime1::g1_pre_barrier_slow_id.
@@ -953,7 +953,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool po
}


void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide, bool /* unaligned */) {
void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
LIR_Address* to_addr = dest->as_address_ptr();
PatchingStub* patch = NULL;
Register compressed_src = rscratch1;
@@ -1178,7 +1178,7 @@ void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type) {
}


void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool /* unaligned */) {
void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
assert(src->is_address(), "should not call otherwise");
assert(dest->is_register(), "should not call otherwise");

@@ -420,7 +420,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
@@ -844,7 +844,7 @@ void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, Shen
Register pre_val_reg = stub->pre_val()->as_register();

if (stub->do_load()) {
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
@@ -1779,8 +1779,6 @@ const char * LIR_Op1::name() const {
switch (move_kind()) {
case lir_move_normal:
return "move";
case lir_move_unaligned:
return "unaligned move";
case lir_move_volatile:
return "volatile_move";
case lir_move_wide:
@@ -1018,7 +1018,6 @@ enum LIR_PatchCode {
enum LIR_MoveKind {
lir_move_normal,
lir_move_volatile,
lir_move_unaligned,
lir_move_wide,
lir_move_max_flag
};
@@ -2073,9 +2072,6 @@ class LIR_List: public CompilationResourceObj {
// result is a stack location for old backend and vreg for UseLinearScan
// stack_loc_temp is an illegal register for old backend
void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
@@ -509,7 +509,6 @@ void LIR_Assembler::emit_op1(LIR_Op1* op) {
} else {
move_op(op->in_opr(), op->result_opr(), op->type(),
op->patch_code(), op->info(), op->pop_fpu_stack(),
op->move_kind() == lir_move_unaligned,
op->move_kind() == lir_move_wide);
}
break;
@@ -771,7 +770,7 @@ void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_
}


void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
if (src->is_register()) {
if (dest->is_register()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
@@ -780,7 +779,7 @@ void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_Patch
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
reg2stack(src, dest, type, pop_fpu_stack);
} else if (dest->is_address()) {
reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide);
} else {
ShouldNotReachHere();
}
@@ -809,8 +808,7 @@ void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_Patch
}

} else if (src->is_address()) {
mem2reg(src, dest, type, patch_code, info, wide, unaligned);

mem2reg(src, dest, type, patch_code, info, wide);
} else {
ShouldNotReachHere();
}
@@ -169,12 +169,12 @@ class LIR_Assembler: public CompilationResourceObj {
void reg2reg (LIR_Opr src, LIR_Opr dest);
void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info,
bool pop_fpu_stack, bool wide, bool unaligned);
bool pop_fpu_stack, bool wide);
void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type);
void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type,
LIR_PatchCode patch_code,
CodeEmitInfo* info, bool wide, bool unaligned);
CodeEmitInfo* info, bool wide);

void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
@@ -214,7 +214,7 @@ class LIR_Assembler: public CompilationResourceObj {

void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide);
LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide);
void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
@@ -2123,7 +2123,7 @@ void LIRGenerator::do_UnsafeGet(UnsafeGet* x) {
#endif
LIR_Address* addr = new LIR_Address(src.result(), offset, type);
if (type == T_LONG || type == T_DOUBLE) {
__ unaligned_move(addr, result);
__ move(addr, result);
} else {
access_load(IN_NATIVE, type, LIR_OprFact::address(addr), result);
}
@@ -2690,11 +2690,7 @@ void LIRGenerator::invoke_load_arguments(Invoke* x, LIRItemList* args, const LIR
if (addr->type() == T_OBJECT) {
__ move_wide(param->result(), addr);
} else
if (addr->type() == T_LONG || addr->type() == T_DOUBLE) {
__ unaligned_move(param->result(), addr);
} else {
__ move(param->result(), addr);
}
__ move(param->result(), addr);
}
}

@@ -3496,11 +3492,7 @@ LIR_Opr LIRGenerator::call_runtime(BasicTypeArray* signature, LIR_OprList* args,
// __ move(arg, tmp);
// arg = tmp;
// }
if (addr->type() == T_LONG || addr->type() == T_DOUBLE) {
__ unaligned_move(arg, addr);
} else {
__ move(arg, addr);
}
__ move(arg, addr);
}
}

@@ -3538,11 +3530,7 @@ LIR_Opr LIRGenerator::call_runtime(BasicTypeArray* signature, LIRItemList* args,
} else {
LIR_Address* addr = loc->as_address_ptr();
arg->load_for_store(addr->type());
if (addr->type() == T_LONG || addr->type() == T_DOUBLE) {
__ unaligned_move(arg->result(), addr);
} else {
__ move(arg->result(), addr);
}
__ move(arg->result(), addr);
}
}

1 comment on commit df0e11b

@openjdk-notifier

This comment has been minimized.

Copy link

@openjdk-notifier openjdk-notifier bot commented on df0e11b Jul 6, 2021

Please sign in to comment.