8311508: ZGC: RAII use of IntelJccErratumAlignment

Reviewed-by: stefank, shade, tschatzl

src/hotspot/cpu/x86/c2_intelJccErratum_x86.cpp

@@ -146,5 +146,6 @@ IntelJccErratumAlignment::~IntelJccErratumAlignment() {
     return;
   }
 
+  assert(pc() - _start_pc > 0, "No instruction aligned");
   assert(!IntelJccErratum::is_crossing_or_ending_at_32_byte_boundary(_start_pc, pc()), "Invalid jcc_size estimate");
 }

src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp

@@ -356,7 +356,7 @@ static void emit_store_fast_path_check_c2(MacroAssembler* masm, Address ref_addr
   // This is a JCC erratum mitigation wrapper for calling the inner check
   int size = store_fast_path_check_size(masm, ref_addr, is_atomic, medium_path);
   // Emit JCC erratum mitigation nops with the right size
-  IntelJccErratumAlignment(*masm, size);
+  IntelJccErratumAlignment intel_alignment(*masm, size);
   // Emit the JCC erratum mitigation guarded code
   emit_store_fast_path_check(masm, ref_addr, is_atomic, medium_path);
 #endif

src/hotspot/cpu/x86/gc/z/z_x86_64.ad

@@ -74,8 +74,10 @@ static void z_load_barrier(MacroAssembler& _masm, const MachNode* node, Address
     return;
   }
   ZLoadBarrierStubC2* const stub = ZLoadBarrierStubC2::create(node, ref_addr, ref);
-  IntelJccErratumAlignment(_masm, 6);
-  __ jcc(Assembler::above, *stub->entry());
+  {
+    IntelJccErratumAlignment intel_alignment(_masm, 6);
+    __ jcc(Assembler::above, *stub->entry());
+  }
   __ bind(*stub->continuation());
 }