8324750: C2: rename Matcher methods using "superword" -> "autovectorization"

eme64 · eme64 · commit f0bae7939a61 · 2024-01-29T08:50:35.000Z
Reviewed-by: kvn, chagedorn
diff --git a/src/hotspot/cpu/aarch64/aarch64.ad b/src/hotspot/cpu/aarch64/aarch64.ad
@@ -2377,7 +2377,7 @@ int Matcher::min_vector_size(const BasicType bt) {
   return MIN2(size, max_size);
 }
 
-int Matcher::superword_max_vector_size(const BasicType bt) {
+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {
   return Matcher::max_vector_size(bt);
 }
 
diff --git a/src/hotspot/cpu/aarch64/aarch64_vector.ad b/src/hotspot/cpu/aarch64/aarch64_vector.ad
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2020, 2023, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2020, 2023, Arm Limited. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -126,7 +126,7 @@ source %{
     }
   }
 
-  bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+  bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
     if (UseSVE == 0) {
       // These operations are not profitable to be vectorized on NEON, because no direct
       // NEON instructions support them. But the match rule support for them is profitable for
diff --git a/src/hotspot/cpu/aarch64/aarch64_vector_ad.m4 b/src/hotspot/cpu/aarch64/aarch64_vector_ad.m4
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2020, 2023, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2020, 2023, Arm Limited. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -116,7 +116,7 @@ source %{
     }
   }
 
-  bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+  bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
     if (UseSVE == 0) {
       // These operations are not profitable to be vectorized on NEON, because no direct
       // NEON instructions support them. But the match rule support for them is profitable for
diff --git a/src/hotspot/cpu/arm/arm.ad b/src/hotspot/cpu/arm/arm.ad
@@ -1002,7 +1002,7 @@ bool Matcher::match_rule_supported(int opcode) {
   return true;  // Per default match rules are supported.
 }
 
-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
   return match_rule_supported_vector(opcode, vlen, bt);
 }
 
@@ -1074,7 +1074,7 @@ int Matcher::min_vector_size(const BasicType bt) {
   return 8/type2aelembytes(bt);
 }
 
-int Matcher::superword_max_vector_size(const BasicType bt) {
+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {
   return Matcher::max_vector_size(bt);
 }
 
diff --git a/src/hotspot/cpu/ppc/ppc.ad b/src/hotspot/cpu/ppc/ppc.ad
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2011, 2023, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2011, 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2012, 2023 SAP SE. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -2173,7 +2173,7 @@ bool Matcher::match_rule_supported(int opcode) {
   return true; // Per default match rules are supported.
 }
 
-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
   return match_rule_supported_vector(opcode, vlen, bt);
 }
 
@@ -2242,7 +2242,7 @@ int Matcher::min_vector_size(const BasicType bt) {
   return max_vector_size(bt); // Same as max.
 }
 
-int Matcher::superword_max_vector_size(const BasicType bt) {
+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {
   return Matcher::max_vector_size(bt);
 }
 
diff --git a/src/hotspot/cpu/riscv/riscv.ad b/src/hotspot/cpu/riscv/riscv.ad
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved.
 // Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@@ -2017,7 +2017,7 @@ int Matcher::min_vector_size(const BasicType bt) {
   return MIN2(size, max_size);
 }
 
-int Matcher::superword_max_vector_size(const BasicType bt) {
+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {
   return Matcher::max_vector_size(bt);
 }
 
diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2020, 2023, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2020, 2023, Arm Limited. All rights reserved.
 // Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@@ -46,7 +46,7 @@ source %{
     }
   }
 
-  bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+  bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
     return match_rule_supported_vector(opcode, vlen, bt);
   }
 
diff --git a/src/hotspot/cpu/s390/s390.ad b/src/hotspot/cpu/s390/s390.ad
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2017, 2023, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2017, 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2017, 2022 SAP SE. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -1513,7 +1513,7 @@ bool Matcher::match_rule_supported(int opcode) {
   return true; // Per default match rules are supported.
 }
 
-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
   return match_rule_supported_vector(opcode, vlen, bt);
 }
 
@@ -1574,7 +1574,7 @@ int Matcher::min_vector_size(const BasicType bt) {
   return max_vector_size(bt); // Same as max.
 }
 
-int Matcher::superword_max_vector_size(const BasicType bt) {
+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {
   return Matcher::max_vector_size(bt);
 }
 
diff --git a/src/hotspot/cpu/x86/x86.ad b/src/hotspot/cpu/x86/x86.ad
@@ -1699,7 +1699,7 @@ static inline bool is_pop_count_instr_target(BasicType bt) {
          (is_non_subword_integral_type(bt) && VM_Version::supports_avx512_vpopcntdq());
 }
 
-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {
+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {
   return match_rule_supported_vector(opcode, vlen, bt);
 }
 
@@ -2280,7 +2280,7 @@ int Matcher::min_vector_size(const BasicType bt) {
   return MIN2(size,max_size);
 }
 
-int Matcher::superword_max_vector_size(const BasicType bt) {
+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {
   // Limit the max vector size for auto vectorization to 256 bits (32 bytes)
   // by default on Cascade Lake
   if (VM_Version::is_default_intel_cascade_lake()) {
diff --git a/src/hotspot/share/opto/matcher.hpp b/src/hotspot/share/opto/matcher.hpp
@@ -331,7 +331,7 @@ class Matcher : public PhaseTransform {
 
   // Identify extra cases that we might want to vectorize automatically
   // And exclude cases which are not profitable to auto-vectorize.
-  static bool match_rule_supported_superword(int opcode, int vlen, BasicType bt);
+  static bool match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt);
 
   // identify extra cases that we might want to provide match rules for
   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
@@ -355,7 +355,7 @@ class Matcher : public PhaseTransform {
             Matcher::min_vector_size(bt) <= size);
   }
   // Limits on max vector size (number of elements) for auto-vectorization.
-  static int superword_max_vector_size(const BasicType bt);
+  static int max_vector_size_auto_vectorization(const BasicType bt);
 
   // Actual max scalable vector register length.
   static int scalable_vector_reg_size(const BasicType bt);
diff --git a/src/hotspot/share/opto/superword.cpp b/src/hotspot/share/opto/superword.cpp
@@ -177,7 +177,7 @@ void SuperWord::unrolling_analysis(int &local_loop_unroll_factor) {
     ignored_loop_nodes[i] = -1;
   }
 
-  int max_vector = Matcher::superword_max_vector_size(T_BYTE);
+  int max_vector = Matcher::max_vector_size_auto_vectorization(T_BYTE);
 
   // Process the loop, some/all of the stack entries will not be in order, ergo
   // need to preprocess the ignored initial state before we process the loop
@@ -291,7 +291,7 @@ void SuperWord::unrolling_analysis(int &local_loop_unroll_factor) {
 
       if (is_java_primitive(bt) == false) continue;
 
-      int cur_max_vector = Matcher::superword_max_vector_size(bt);
+      int cur_max_vector = Matcher::max_vector_size_auto_vectorization(bt);
 
       // If a max vector exists which is not larger than _local_loop_unroll_factor
       // stop looking, we already have the max vector to map to.
@@ -789,13 +789,13 @@ int SuperWord::get_vw_bytes_special(MemNode* s) {
       }
     }
     if (should_combine_adjacent) {
-      vw = MIN2(Matcher::superword_max_vector_size(btype)*type2aelembytes(btype), vw * 2);
+      vw = MIN2(Matcher::max_vector_size_auto_vectorization(btype)*type2aelembytes(btype), vw * 2);
     }
   }
 
   // Check for special case where there is a type conversion between different data size.
   int vectsize = max_vector_size_in_def_use_chain(s);
-  if (vectsize < Matcher::superword_max_vector_size(btype)) {
+  if (vectsize < Matcher::max_vector_size_auto_vectorization(btype)) {
     vw = MIN2(vectsize * type2aelembytes(btype), vw);
   }
 
@@ -969,8 +969,8 @@ bool SuperWord::stmts_can_pack(Node* s1, Node* s2, int align) {
   if(!is_java_primitive(bt1) || !is_java_primitive(bt2))
     return false;
   BasicType longer_bt = longer_type_for_conversion(s1);
-  if (Matcher::superword_max_vector_size(bt1) < 2 ||
-      (longer_bt != T_ILLEGAL && Matcher::superword_max_vector_size(longer_bt) < 2)) {
+  if (Matcher::max_vector_size_auto_vectorization(bt1) < 2 ||
+      (longer_bt != T_ILLEGAL && Matcher::max_vector_size_auto_vectorization(longer_bt) < 2)) {
     return false; // No vectors for this type
   }
 
@@ -3018,7 +3018,7 @@ bool SuperWord::construct_bb() {
             // First see if we can map the reduction on the given system we are on, then
             // make a data entry operation for each reduction we see.
             BasicType bt = use->bottom_type()->basic_type();
-            if (ReductionNode::implemented(use->Opcode(), Matcher::superword_max_vector_size(bt), bt)) {
+            if (ReductionNode::implemented(use->Opcode(), Matcher::max_vector_size_auto_vectorization(bt), bt)) {
               reduction_uses++;
             }
           }
@@ -3172,10 +3172,10 @@ int SuperWord::max_vector_size_in_def_use_chain(Node* n) {
     vt = (newt == T_ILLEGAL) ? vt : newt;
   }
 
-  int max = Matcher::superword_max_vector_size(vt);
+  int max = Matcher::max_vector_size_auto_vectorization(vt);
   // If now there is no vectors for the longest type, the nodes with the longest
   // type in the def-use chain are not packed in SuperWord::stmts_can_pack.
-  return max < 2 ? Matcher::superword_max_vector_size(bt) : max;
+  return max < 2 ? Matcher::max_vector_size_auto_vectorization(bt) : max;
 }
 
 //-------------------------compute_vector_element_type-----------------------
diff --git a/src/hotspot/share/opto/vectornode.cpp b/src/hotspot/share/opto/vectornode.cpp
@@ -389,7 +389,7 @@ int VectorNode::scalar_opcode(int sopc, BasicType bt) {
 
 // Limits on vector size (number of elements) for auto-vectorization.
 bool VectorNode::vector_size_supported_superword(const BasicType bt, int size) {
-  return Matcher::superword_max_vector_size(bt) >= size &&
+  return Matcher::max_vector_size_auto_vectorization(bt) >= size &&
          Matcher::min_vector_size(bt) <= size;
 }
 
@@ -409,7 +409,7 @@ bool VectorNode::implemented(int opc, uint vlen, BasicType bt) {
     if (VectorNode::is_vector_integral_negate(vopc)) {
       return is_vector_integral_negate_supported(vopc, vlen, bt, false);
     }
-    return vopc > 0 && Matcher::match_rule_supported_superword(vopc, vlen, bt);
+    return vopc > 0 && Matcher::match_rule_supported_auto_vectorization(vopc, vlen, bt);
   }
   return false;
 }
@@ -1434,7 +1434,7 @@ bool VectorCastNode::implemented(int opc, uint vlen, BasicType src_type, BasicTy
       (vlen > 1) && is_power_of_2(vlen) &&
       VectorNode::vector_size_supported_superword(dst_type, vlen)) {
     int vopc = VectorCastNode::opcode(opc, src_type);
-    return vopc > 0 && Matcher::match_rule_supported_superword(vopc, vlen, dst_type);
+    return vopc > 0 && Matcher::match_rule_supported_auto_vectorization(vopc, vlen, dst_type);
   }
   return false;
 }
@@ -1528,7 +1528,7 @@ bool ReductionNode::implemented(int opc, uint vlen, BasicType bt) {
       (vlen > 1) && is_power_of_2(vlen) &&
       VectorNode::vector_size_supported_superword(bt, vlen)) {
     int vopc = ReductionNode::opcode(opc, bt);
-    return vopc != opc && Matcher::match_rule_supported_superword(vopc, vlen, bt);
+    return vopc != opc && Matcher::match_rule_supported_auto_vectorization(vopc, vlen, bt);
   }
   return false;
 }

Original file line number	Diff line number	Diff line change
`@@ -2377,7 +2377,7 @@ int Matcher::min_vector_size(const BasicType bt) {`
`2377`	`2377`	`return MIN2(size, max_size);`
`2378`	`2378`	`}`
`2379`	`2379`
`2380`		`-int Matcher::superword_max_vector_size(const BasicType bt) {`
	`2380`	`+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {`
`2381`	`2381`	`return Matcher::max_vector_size(bt);`
`2382`	`2382`	`}`
`2383`	`2383`
Original file line number	Diff line number	Diff line change
`@@ -1,5 +1,5 @@`
`1`	`1`	`//`
`2`		`-// Copyright (c) 2020, 2023, Oracle and/or its affiliates. All rights reserved.`
	`2`	`+// Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.`
`3`	`3`	`// Copyright (c) 2020, 2023, Arm Limited. All rights reserved.`
`4`	`4`	`// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.`
`5`	`5`	`//`
`@@ -126,7 +126,7 @@ source %{`
`126`	`126`	`}`
`127`	`127`	`}`
`128`	`128`
`129`		`- bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {`
	`129`	`+ bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {`
`130`	`130`	`if (UseSVE == 0) {`
`131`	`131`	`// These operations are not profitable to be vectorized on NEON, because no direct`
`132`	`132`	`// NEON instructions support them. But the match rule support for them is profitable for`
Original file line number	Diff line number	Diff line change
`@@ -1002,7 +1002,7 @@ bool Matcher::match_rule_supported(int opcode) {`
`1002`	`1002`	`return true; // Per default match rules are supported.`
`1003`	`1003`	`}`
`1004`	`1004`
`1005`		`-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {`
	`1005`	`+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {`
`1006`	`1006`	`return match_rule_supported_vector(opcode, vlen, bt);`
`1007`	`1007`	`}`
`1008`	`1008`
`@@ -1074,7 +1074,7 @@ int Matcher::min_vector_size(const BasicType bt) {`
`1074`	`1074`	`return 8/type2aelembytes(bt);`
`1075`	`1075`	`}`
`1076`	`1076`
`1077`		`-int Matcher::superword_max_vector_size(const BasicType bt) {`
	`1077`	`+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {`
`1078`	`1078`	`return Matcher::max_vector_size(bt);`
`1079`	`1079`	`}`
`1080`	`1080`
Original file line number	Diff line number	Diff line change
`@@ -1,5 +1,5 @@`
`1`	`1`	`//`
`2`		`-// Copyright (c) 2011, 2023, Oracle and/or its affiliates. All rights reserved.`
	`2`	`+// Copyright (c) 2011, 2024, Oracle and/or its affiliates. All rights reserved.`
`3`	`3`	`// Copyright (c) 2012, 2023 SAP SE. All rights reserved.`
`4`	`4`	`// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.`
`5`	`5`	`//`
`@@ -2173,7 +2173,7 @@ bool Matcher::match_rule_supported(int opcode) {`
`2173`	`2173`	`return true; // Per default match rules are supported.`
`2174`	`2174`	`}`
`2175`	`2175`
`2176`		`-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {`
	`2176`	`+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {`
`2177`	`2177`	`return match_rule_supported_vector(opcode, vlen, bt);`
`2178`	`2178`	`}`
`2179`	`2179`
`@@ -2242,7 +2242,7 @@ int Matcher::min_vector_size(const BasicType bt) {`
`2242`	`2242`	`return max_vector_size(bt); // Same as max.`
`2243`	`2243`	`}`
`2244`	`2244`
`2245`		`-int Matcher::superword_max_vector_size(const BasicType bt) {`
	`2245`	`+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {`
`2246`	`2246`	`return Matcher::max_vector_size(bt);`
`2247`	`2247`	`}`
`2248`	`2248`
Original file line number	Diff line number	Diff line change
`@@ -1,5 +1,5 @@`
`1`	`1`	`//`
`2`		`-// Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.`
	`2`	`+// Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.`
`3`	`3`	`// Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved.`
`4`	`4`	`// Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.`
`5`	`5`	`// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.`
`@@ -2017,7 +2017,7 @@ int Matcher::min_vector_size(const BasicType bt) {`
`2017`	`2017`	`return MIN2(size, max_size);`
`2018`	`2018`	`}`
`2019`	`2019`
`2020`		`-int Matcher::superword_max_vector_size(const BasicType bt) {`
	`2020`	`+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {`
`2021`	`2021`	`return Matcher::max_vector_size(bt);`
`2022`	`2022`	`}`
`2023`	`2023`
Original file line number	Diff line number	Diff line change
`@@ -1,5 +1,5 @@`
`1`	`1`	`//`
`2`		`-// Copyright (c) 2017, 2023, Oracle and/or its affiliates. All rights reserved.`
	`2`	`+// Copyright (c) 2017, 2024, Oracle and/or its affiliates. All rights reserved.`
`3`	`3`	`// Copyright (c) 2017, 2022 SAP SE. All rights reserved.`
`4`	`4`	`// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.`
`5`	`5`	`//`
`@@ -1513,7 +1513,7 @@ bool Matcher::match_rule_supported(int opcode) {`
`1513`	`1513`	`return true; // Per default match rules are supported.`
`1514`	`1514`	`}`
`1515`	`1515`
`1516`		`-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {`
	`1516`	`+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {`
`1517`	`1517`	`return match_rule_supported_vector(opcode, vlen, bt);`
`1518`	`1518`	`}`
`1519`	`1519`
`@@ -1574,7 +1574,7 @@ int Matcher::min_vector_size(const BasicType bt) {`
`1574`	`1574`	`return max_vector_size(bt); // Same as max.`
`1575`	`1575`	`}`
`1576`	`1576`
`1577`		`-int Matcher::superword_max_vector_size(const BasicType bt) {`
	`1577`	`+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {`
`1578`	`1578`	`return Matcher::max_vector_size(bt);`
`1579`	`1579`	`}`
`1580`	`1580`
Original file line number	Diff line number	Diff line change
`@@ -1699,7 +1699,7 @@ static inline bool is_pop_count_instr_target(BasicType bt) {`
`1699`	`1699`	`(is_non_subword_integral_type(bt) && VM_Version::supports_avx512_vpopcntdq());`
`1700`	`1700`	`}`
`1701`	`1701`
`1702`		`-bool Matcher::match_rule_supported_superword(int opcode, int vlen, BasicType bt) {`
	`1702`	`+bool Matcher::match_rule_supported_auto_vectorization(int opcode, int vlen, BasicType bt) {`
`1703`	`1703`	`return match_rule_supported_vector(opcode, vlen, bt);`
`1704`	`1704`	`}`
`1705`	`1705`
`@@ -2280,7 +2280,7 @@ int Matcher::min_vector_size(const BasicType bt) {`
`2280`	`2280`	`return MIN2(size,max_size);`
`2281`	`2281`	`}`
`2282`	`2282`
`2283`		`-int Matcher::superword_max_vector_size(const BasicType bt) {`
	`2283`	`+int Matcher::max_vector_size_auto_vectorization(const BasicType bt) {`
`2284`	`2284`	`// Limit the max vector size for auto vectorization to 256 bits (32 bytes)`
`2285`	`2285`	`// by default on Cascade Lake`
`2286`	`2286`	`if (VM_Version::is_default_intel_cascade_lake()) {`