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8321371: SpinPause() not implemented for bsd_aarch64/macOS
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Reviewed-by: eosterlund, dholmes, dcubed, eastigeevich, shade
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Fredrik Bredberg authored and fisk committed Jan 8, 2024
1 parent 458e563 commit fc04750
Showing 1 changed file with 33 additions and 1 deletion.
34 changes: 33 additions & 1 deletion src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -514,7 +514,39 @@ static inline void atomic_copy64(const volatile void *src, volatile void *dst) {

extern "C" {
int SpinPause() {
return 0;
// We don't use StubRoutines::aarch64::spin_wait stub in order to
// avoid a costly call to os::current_thread_enable_wx() on MacOS.
// We should return 1 if SpinPause is implemented, and since there
// will be a sequence of 11 instructions for NONE and YIELD and 12
// instructions for NOP and ISB, SpinPause will always return 1.
uint64_t br_dst;
const int instructions_per_case = 2;
int64_t off = VM_Version::spin_wait_desc().inst() * instructions_per_case * Assembler::instruction_size;

assert(VM_Version::spin_wait_desc().inst() >= SpinWait::NONE &&
VM_Version::spin_wait_desc().inst() <= SpinWait::YIELD, "must be");
assert(-1 == SpinWait::NONE, "must be");
assert( 0 == SpinWait::NOP, "must be");
assert( 1 == SpinWait::ISB, "must be");
assert( 2 == SpinWait::YIELD, "must be");

asm volatile(
" adr %[d], 20 \n" // 20 == PC here + 5 instructions => address
// to entry for case SpinWait::NOP
" add %[d], %[d], %[o] \n"
" br %[d] \n"
" b SpinPause_return \n" // case SpinWait::NONE (-1)
" nop \n" // padding
" nop \n" // case SpinWait::NOP ( 0)
" b SpinPause_return \n"
" isb \n" // case SpinWait::ISB ( 1)
" b SpinPause_return \n"
" yield \n" // case SpinWait::YIELD ( 2)
"SpinPause_return: \n"
: [d]"=&r"(br_dst)
: [o]"r"(off)
: "memory");
return 1;
}

void _Copy_conjoint_jshorts_atomic(const jshort* from, jshort* to, size_t count) {
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