8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule #12295

feilongjiang · 2023-01-30T13:57:59Z

The RISC-V architecture does not support conditional move instructions or flags register for now. So we set ConditionalMoveLimit to 0 for this port to avoid the generation of the CMove node by C2. But turns out this could not avoid all CMove nodes generation: some CMove generations are not guarded by this parameter. Therefore, we still added several match rules in AD file for CMove nodes like CMoveI_CmpI/CMoveL_CmpL etc. to cover those scenarios:

jdk/src/hotspot/cpu/riscv/riscv.ad

Lines 9994 to 10096 in ebb84ad

    
           // Conditional Move Instructions 
        
           instruct cmovI_cmpI(iRegINoSp dst, iRegI src, iRegI op1, iRegI op2, cmpOp cop) %{ 
        
             match(Set dst (CMoveI (Binary cop (CmpI op1 op2)) (Binary dst src))); 
        
             ins_cost(ALU_COST + BRANCH_COST); 
        
             format %{ 
        
               "CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpI\n\t" 
        
             %} 
        
             ins_encode %{ 
        
               __ enc_cmove($cop$$cmpcode, 
        
                            as_Register($op1$$reg), as_Register($op2$$reg), 
        
                            as_Register($dst$$reg), as_Register($src$$reg)); 
        
             %} 
        
             ins_pipe(pipe_class_compare); 
        
           %} 
        
           instruct cmovI_cmpU(iRegINoSp dst, iRegI src, iRegI op1, iRegI op2, cmpOpU cop) %{ 
        
             match(Set dst (CMoveI (Binary cop (CmpU op1 op2)) (Binary dst src))); 
        
             ins_cost(ALU_COST + BRANCH_COST); 
        
             format %{ 
        
               "CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpU\n\t" 
        
             %} 
        
             ins_encode %{ 
        
               __ enc_cmove($cop$$cmpcode | C2_MacroAssembler::unsigned_branch_mask, 
        
                            as_Register($op1$$reg), as_Register($op2$$reg), 
        
                            as_Register($dst$$reg), as_Register($src$$reg)); 
        
             %} 
        
             ins_pipe(pipe_class_compare); 
        
           %} 
        
           instruct cmovI_cmpL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOp cop) %{ 
        
             match(Set dst (CMoveI (Binary cop (CmpL op1 op2)) (Binary dst src))); 
        
             ins_cost(ALU_COST + BRANCH_COST); 
        
             format %{ 
        
               "CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpL\n\t" 
        
             %} 
        
             ins_encode %{ 
        
               __ enc_cmove($cop$$cmpcode, 
        
                            as_Register($op1$$reg), as_Register($op2$$reg), 
        
                            as_Register($dst$$reg), as_Register($src$$reg)); 
        
             %} 
        
             ins_pipe(pipe_class_compare); 
        
           %} 
        
           instruct cmovL_cmpL(iRegLNoSp dst, iRegL src, iRegL op1, iRegL op2, cmpOp cop) %{ 
        
             match(Set dst (CMoveL (Binary cop (CmpL op1 op2)) (Binary dst src))); 
        
             ins_cost(ALU_COST + BRANCH_COST); 
        
             format %{ 
        
               "CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovL_cmpL\n\t" 
        
             %} 
        
             ins_encode %{ 
        
               __ enc_cmove($cop$$cmpcode, 
        
                            as_Register($op1$$reg), as_Register($op2$$reg), 
        
                            as_Register($dst$$reg), as_Register($src$$reg)); 
        
             %} 
        
             ins_pipe(pipe_class_compare); 
        
           %} 
        
           instruct cmovL_cmpUL(iRegLNoSp dst, iRegL src, iRegL op1, iRegL op2, cmpOpU cop) %{ 
        
             match(Set dst (CMoveL (Binary cop (CmpUL op1 op2)) (Binary dst src))); 
        
             ins_cost(ALU_COST + BRANCH_COST); 
        
             format %{ 
        
               "CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovL_cmpUL\n\t" 
        
             %} 
        
             ins_encode %{ 
        
               __ enc_cmove($cop$$cmpcode | C2_MacroAssembler::unsigned_branch_mask, 
        
                            as_Register($op1$$reg), as_Register($op2$$reg), 
        
                            as_Register($dst$$reg), as_Register($src$$reg)); 
        
             %} 
        
             ins_pipe(pipe_class_compare); 
        
           %} 
        
           instruct cmovI_cmpUL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOpU cop) %{ 
        
             match(Set dst (CMoveI (Binary cop (CmpUL op1 op2)) (Binary dst src))); 
        
             ins_cost(ALU_COST + BRANCH_COST); 
        
             format %{ 
        
               "CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpUL\n\t" 
        
             %} 
        
             ins_encode %{ 
        
               __ enc_cmove($cop$$cmpcode | C2_MacroAssembler::unsigned_branch_mask, 
        
                            as_Register($op1$$reg), as_Register($op2$$reg), 
        
                            as_Register($dst$$reg), as_Register($src$$reg)); 
        
             %} 
        
             ins_pipe(pipe_class_compare); 
        
           %}

In this case, we observed that CMoveL was generated in PhaseIdealLoop::transform_long_range_checks, which is expected to match cmoveL_cmpL node:

jdk/src/hotspot/share/opto/loopnode.cpp

Lines 1344 to 1351 in ebb84ad

    
           // L_clamp = Q_min < 0 ? 0 : Q_min 
        
           Node* Q_min_cmp = new CmpLNode(Q_min, long_zero); 
        
           register_new_node(Q_min_cmp, entry_control); 
        
           Node* Q_min_bool = new BoolNode(Q_min_cmp, BoolTest::lt); 
        
           register_new_node(Q_min_bool, entry_control); 
        
           Node* L_clamp = new CMoveLNode(Q_min_bool, Q_min, long_zero, TypeLong::LONG); 
        
           register_new_node(L_clamp, entry_control); 
        
           // (This could also be coded bitwise as L_clamp = Q_min & ~(Q_min>>63).)

But PhaseIdealLoop::optimize after PhaseIdealLoop::transform_long_range_checks may replace CmpLNode with CmpINode in CmpLNode::Ideal:

jdk/src/hotspot/share/opto/subnode.cpp

Lines 877 to 886 in ebb84ad

    
           Node *CmpLNode::Ideal( PhaseGVN *phase, bool can_reshape ) { 
        
             const TypeLong *t2 = phase->type(in(2))->isa_long(); 
        
             if (Opcode() == Op_CmpL && in(1)->Opcode() == Op_ConvI2L && t2 && t2->is_con()) { 
        
               const jlong con = t2->get_con(); 
        
               if (con >= min_jint && con <= max_jint) { 
        
                 return new CmpINode(in(1)->in(1), phase->intcon((jint)con)); 
        
               } 
        
             } 
        
             return NULL; 
        
           }

There is no match rule in riscv.ad for CMoveL with CmpI, which result in the bad AD file crash.

With this fix, we should be able to cover all other CMove scenarios not guarded by ConditionalMoveLimit.

Testing:

jdk_foreign with -XX:-TieredCompilation (linux-riscv64, fastdebug)
Tier1~3 on Unmatched board (linux-riscv64, release)

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Issue

JDK-8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule

Reviewers

Fei Yang (@RealFYang - Reviewer)
Yadong Wang (@yadongw - Author)

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Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk pull/12295/head:pull/12295
$ git checkout pull/12295

Update a local copy of the PR:
$ git checkout pull/12295
$ git pull https://git.openjdk.org/jdk pull/12295/head

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Checkout this PR locally:
$ git pr checkout 12295

View PR using the GUI difftool:
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Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/12295.diff

bridgekeeper · 2023-01-30T13:59:14Z

👋 Welcome back fjiang! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

openjdk · 2023-01-30T14:00:53Z

@feilongjiang The following label will be automatically applied to this pull request:

hotspot-compiler

When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command.

mlbridge · 2023-01-30T14:51:07Z

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00: Full (a296e729)

RealFYang

Looks reasonable.

openjdk · 2023-01-31T08:16:42Z

@feilongjiang This change now passes all automated pre-integration checks.

ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details.

After integration, the commit message for the final commit will be:

8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule

Reviewed-by: fyang, yadongwang

You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed.

At the time when this comment was updated there had been 83 new commits pushed to the master branch:

4c9de87: 8301655: Problemlist jdk/jdk/nio/zipfs/TestLocOffsetFromZip64EF.java on Linux
04278e6: 8301564: Non-C-heap allocated ResourceHashtable keys and values must have trivial destructor
b00b70c: 8286907: keytool should warn about weak PBE algorithms
ee0f5b5: 8301392: Port fdlibm log1p to Java
f696785: 8300869: Make use of the Double.toString(double) algorithm in java.util.Formatter
cf6b9eb: 8301637: ThreadLocalRandom.current().doubles().parallel() contention
c647ae6: 8301149: Parallel: Refactor MutableNUMASpace::update_layout
de57733: 8301644: com/sun/jdi/JdbStopThreadTest.java fails after JDK-8300811
930ec00: 8301636: Minor cleanup in CommentHelper and DocPretty
725d57b: 8301659: Resolve initialization reordering issues on Windows for libawt and libsaproc
... and 73 more: https://git.openjdk.org/jdk/compare/ebb84ad70d3295d9a429904fcdacdb8ecd1bf434...master

As there are no conflicts, your changes will automatically be rebased on top of these commits when integrating. If you prefer to avoid this automatic rebasing, please check the documentation for the /integrate command for further details.

As you do not have Committer status in this project an existing Committer must agree to sponsor your change. Possible candidates are the reviewers of this PR (@RealFYang) but any other Committer may sponsor as well.

➡️ To flag this PR as ready for integration with the above commit message, type /integrate in a new comment. (Afterwards, your sponsor types /sponsor in a new comment to perform the integration).

yadongw · 2023-02-02T02:02:07Z

LGTM. But with ConditionalMoveLimit of 0, can we guarantee all the CMoves covered by these match rules?

feilongjiang · 2023-02-02T02:24:07Z

LGTM. But with ConditionalMoveLimit of 0, can we guarantee all the CMoves covered by these match rules?

Yes, this pr added CMoveL_CmpI and CMoveL_CmpU, combined with existing CMove instructs, we should be able to cover all other CMove scenarios not guarded by ConditionalMoveLimit.

feilongjiang · 2023-02-03T04:44:25Z

@RealFYang @yadongw -- Thanks!
/integrate

openjdk · 2023-02-03T04:45:52Z

@feilongjiang
Your change (at version a296e72) is now ready to be sponsored by a Committer.

RealFYang · 2023-02-03T05:01:31Z

/sponsor

openjdk · 2023-02-03T05:03:30Z

Going to push as commit 3ad6aef.
Since your change was applied there have been 83 commits pushed to the master branch:

4c9de87: 8301655: Problemlist jdk/jdk/nio/zipfs/TestLocOffsetFromZip64EF.java on Linux
04278e6: 8301564: Non-C-heap allocated ResourceHashtable keys and values must have trivial destructor
b00b70c: 8286907: keytool should warn about weak PBE algorithms
ee0f5b5: 8301392: Port fdlibm log1p to Java
f696785: 8300869: Make use of the Double.toString(double) algorithm in java.util.Formatter
cf6b9eb: 8301637: ThreadLocalRandom.current().doubles().parallel() contention
c647ae6: 8301149: Parallel: Refactor MutableNUMASpace::update_layout
de57733: 8301644: com/sun/jdi/JdbStopThreadTest.java fails after JDK-8300811
930ec00: 8301636: Minor cleanup in CommentHelper and DocPretty
725d57b: 8301659: Resolve initialization reordering issues on Windows for libawt and libsaproc
... and 73 more: https://git.openjdk.org/jdk/compare/ebb84ad70d3295d9a429904fcdacdb8ecd1bf434...master

Your commit was automatically rebased without conflicts.

openjdk · 2023-02-03T05:03:43Z

@RealFYang @feilongjiang Pushed as commit 3ad6aef.

💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored.

add missing match rules for CMoveL

a296e72

feilongjiang marked this pull request as draft January 30, 2023 13:58

openjdk bot added the hotspot-compiler hotspot-compiler-dev@openjdk.org label Jan 30, 2023

feilongjiang marked this pull request as ready for review January 30, 2023 14:45

openjdk bot added the rfr Pull request is ready for review label Jan 30, 2023

RealFYang approved these changes Jan 31, 2023

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feilongjiang deleted the fix_cmove_bad_ad branch February 3, 2023 06:06

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8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule #12295

8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule #12295

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	// Conditional Move Instructions
	instruct cmovI_cmpI(iRegINoSp dst, iRegI src, iRegI op1, iRegI op2, cmpOp cop) %{
	match(Set dst (CMoveI (Binary cop (CmpI op1 op2)) (Binary dst src)));
	ins_cost(ALU_COST + BRANCH_COST);

	format %{
	"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpI\n\t"
	%}

	ins_encode %{
	__ enc_cmove($cop$$cmpcode,
	as_Register($op1$$reg), as_Register($op2$$reg),
	as_Register($dst$$reg), as_Register($src$$reg));
	%}

	ins_pipe(pipe_class_compare);
	%}

	instruct cmovI_cmpU(iRegINoSp dst, iRegI src, iRegI op1, iRegI op2, cmpOpU cop) %{
	match(Set dst (CMoveI (Binary cop (CmpU op1 op2)) (Binary dst src)));
	ins_cost(ALU_COST + BRANCH_COST);

	format %{
	"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpU\n\t"
	%}

	ins_encode %{
	__ enc_cmove($cop$$cmpcode \| C2_MacroAssembler::unsigned_branch_mask,
	as_Register($op1$$reg), as_Register($op2$$reg),
	as_Register($dst$$reg), as_Register($src$$reg));
	%}

	ins_pipe(pipe_class_compare);
	%}

	instruct cmovI_cmpL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOp cop) %{
	match(Set dst (CMoveI (Binary cop (CmpL op1 op2)) (Binary dst src)));
	ins_cost(ALU_COST + BRANCH_COST);

	format %{
	"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpL\n\t"
	%}

	ins_encode %{
	__ enc_cmove($cop$$cmpcode,
	as_Register($op1$$reg), as_Register($op2$$reg),
	as_Register($dst$$reg), as_Register($src$$reg));
	%}

	ins_pipe(pipe_class_compare);
	%}

	instruct cmovL_cmpL(iRegLNoSp dst, iRegL src, iRegL op1, iRegL op2, cmpOp cop) %{
	match(Set dst (CMoveL (Binary cop (CmpL op1 op2)) (Binary dst src)));
	ins_cost(ALU_COST + BRANCH_COST);

	format %{
	"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovL_cmpL\n\t"
	%}

	ins_encode %{
	__ enc_cmove($cop$$cmpcode,
	as_Register($op1$$reg), as_Register($op2$$reg),
	as_Register($dst$$reg), as_Register($src$$reg));
	%}

	ins_pipe(pipe_class_compare);
	%}

	instruct cmovL_cmpUL(iRegLNoSp dst, iRegL src, iRegL op1, iRegL op2, cmpOpU cop) %{
	match(Set dst (CMoveL (Binary cop (CmpUL op1 op2)) (Binary dst src)));
	ins_cost(ALU_COST + BRANCH_COST);

	format %{
	"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovL_cmpUL\n\t"
	%}

	ins_encode %{
	__ enc_cmove($cop$$cmpcode \| C2_MacroAssembler::unsigned_branch_mask,
	as_Register($op1$$reg), as_Register($op2$$reg),
	as_Register($dst$$reg), as_Register($src$$reg));
	%}

	ins_pipe(pipe_class_compare);
	%}

	instruct cmovI_cmpUL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOpU cop) %{
	match(Set dst (CMoveI (Binary cop (CmpUL op1 op2)) (Binary dst src)));
	ins_cost(ALU_COST + BRANCH_COST);

	format %{
	"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpUL\n\t"
	%}

	ins_encode %{
	__ enc_cmove($cop$$cmpcode \| C2_MacroAssembler::unsigned_branch_mask,
	as_Register($op1$$reg), as_Register($op2$$reg),
	as_Register($dst$$reg), as_Register($src$$reg));
	%}

	ins_pipe(pipe_class_compare);
	%}

	// L_clamp = Q_min < 0 ? 0 : Q_min
	Node* Q_min_cmp = new CmpLNode(Q_min, long_zero);
	register_new_node(Q_min_cmp, entry_control);
	Node* Q_min_bool = new BoolNode(Q_min_cmp, BoolTest::lt);
	register_new_node(Q_min_bool, entry_control);
	Node* L_clamp = new CMoveLNode(Q_min_bool, Q_min, long_zero, TypeLong::LONG);
	register_new_node(L_clamp, entry_control);
	// (This could also be coded bitwise as L_clamp = Q_min & ~(Q_min>>63).)

	Node CmpLNode::Ideal( PhaseGVN phase, bool can_reshape ) {
	const TypeLong *t2 = phase->type(in(2))->isa_long();
	if (Opcode() == Op_CmpL && in(1)->Opcode() == Op_ConvI2L && t2 && t2->is_con()) {
	const jlong con = t2->get_con();
	if (con >= min_jint && con <= max_jint) {
	return new CmpINode(in(1)->in(1), phase->intcon((jint)con));
	}
	}
	return NULL;
	}

8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule #12295

8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule #12295

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