8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock #16703

zifeihan · 2023-11-17T02:32:16Z

This is inspired by https://bugs.openjdk.org/browse/JDK-8316880.
MacroAssembler::lightweight_lock/unlock is non-trivial on linux-riscv64 platform. Passing t0(aka x5) as temporary register to these two assember functions can also be error prone. As a reserved scratch register, t0 is implicitly clobberred by various assembler functions. This fixes the issue by finding and passing a different register, which is similar with https://bugs.openjdk.org/browse/JDK-8316880.

Testing:

Run tier1-3 tests with qemu 8.1.50 (default locking mode) (release)
Run non-trivial benchmark workloads (specjbb2005, dacapo, renaissance) with -XX:LockingMode=2 (fastdebug & release)
hotspot:tier4 on hifive unmatched (release)

Progress

Change must be properly reviewed (1 review required, with at least 1 Reviewer)
Change must not contain extraneous whitespace
Commit message must refer to an issue

Issue

JDK-8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock (Enhancement - P4)

Reviewers

Fei Yang (@RealFYang - Reviewer) ⚠️ Review applies to eccb82c9
Robbin Ehn (@robehn - Reviewer)

Reviewing

Using git

Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/16703/head:pull/16703
$ git checkout pull/16703

Update a local copy of the PR:
$ git checkout pull/16703
$ git pull https://git.openjdk.org/jdk.git pull/16703/head

Using Skara CLI tools

Checkout this PR locally:
$ git pr checkout 16703

View PR using the GUI difftool:
$ git pr show -t 16703

Using diff file

Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/16703.diff

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…:lightweight_lock/unlock

bridgekeeper · 2023-11-17T02:33:27Z

👋 Welcome back gcao! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

openjdk · 2023-11-17T02:35:18Z

@zifeihan The following label will be automatically applied to this pull request:

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mlbridge · 2023-11-17T02:38:37Z

Webrevs

RealFYang

Looks good. Thanks for fixing this.

openjdk · 2023-11-17T03:28:39Z

@zifeihan This change now passes all automated pre-integration checks.

ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details.

After integration, the commit message for the final commit will be:

8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock

Reviewed-by: fyang, rehn

You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed.

At the time when this comment was updated there had been 29 new commits pushed to the master branch:

60c8d9c: 8320300: Adjust hs_err output in malloc/mmap error cases
9f6a4a3: 8320386: Remove java/nio/channels/vthread/BlockingChannelOps.java#direct-register from ProblemList
db1d823: 8320168: handle setsocktopt return values
6c5e15c: 8316557: Make fields final in 'sun.util' package
de51aa1: 8283214: [macos] Screen magnifier does not show the magnified text for JcomboBox
179f505: 8320361: Doc error in RemoteRecordingStream.java
8ff7d6e: 8295391: Add discussion of binary <-> decimal conversion issues
99570fb: 8320258: Refresh building.md
a1e7a30: 8320212: Disable GCC stringop-overflow warning for affected files
0881f2b: 8318562: Computational test more than 2x slower when AVX instructions are used
... and 19 more: https://git.openjdk.org/jdk/compare/9faead1469481e268b451f2853c8fec8613426b9...master

As there are no conflicts, your changes will automatically be rebased on top of these commits when integrating. If you prefer to avoid this automatic rebasing, please check the documentation for the /integrate command for further details.

As you do not have Committer status in this project an existing Committer must agree to sponsor your change. Possible candidates are the reviewers of this PR (@RealFYang, @robehn) but any other Committer may sponsor as well.

➡️ To flag this PR as ready for integration with the above commit message, type /integrate in a new comment. (Afterwards, your sponsor types /sponsor in a new comment to perform the integration).

robehn

Hi, thanks, looks good, but if 'temp'/'scratch' is not suppose to be t0, why not assert this in the 'callees' ?

E.g. in C2_MacroAssembler::fast_lock this assert:
assert_different_registers(oop, box, tmp, disp_hdr, t0); needs to updated with tmp3Reg.
Other 'callee' have no asserts.

…unlock

zifeihan · 2023-11-20T09:38:14Z

Hi, thanks, looks good, but if 'temp'/'scratch' is not suppose to be t0, why not assert this in the 'callees' ?

E.g. in C2_MacroAssembler::fast_lock this assert: assert_different_registers(oop, box, tmp, disp_hdr, t0); needs to updated with tmp3Reg. Other 'callee' have no asserts.

@robehn Thanks for your review, I have updated several assertions for calls to MacroAssembler::lightweight_lock/unlock.

robehn · 2023-11-20T09:50:46Z

Hi, thanks!

Sorry with callee I meant all methods that have cmpxchg in them, such
macroAssembler_riscv.cpp: MacroAssembler::lightweight_(un)lock
Where this assert is also assert_different_registers(obj, hdr, tmp1, tmp2);
So there are a couple of more, sorry.

There also a special cmpxchg_obj_header which still uses t0.
You want to fix that in this same PR?

zifeihan · 2023-11-20T10:23:28Z

Hi, thanks!

Sorry with callee I meant all methods that have cmpxchg in them, such macroAssembler_riscv.cpp: MacroAssembler::lightweight_(un)lock Where this assert is also assert_different_registers(obj, hdr, tmp1, tmp2); So there are a couple of more, sorry.

There also a special cmpxchg_obj_header which still uses t0. You want to fix that in this same PR?

Hi @robehn, I am not sure if understand it correctly. Do you want me to revert my last comment and add t0 in the list of assert_different_registers in MacroAssembler::lightweight_(un)lock? I think it might be better to handle the special case for cmpxchg_obj_header in another PR, is that OK for you?

robehn · 2023-11-20T10:34:12Z

Hi, thanks!
Sorry with callee I meant all methods that have cmpxchg in them, such macroAssembler_riscv.cpp: MacroAssembler::lightweight_(un)lock Where this assert is also assert_different_registers(obj, hdr, tmp1, tmp2); So there are a couple of more, sorry.
There also a special cmpxchg_obj_header which still uses t0. You want to fix that in this same PR?

Hi @robehn, I am not sure if understand it correctly. Do you want me to revert my last comment and add t0 in the list of assert_different_registers in MacroAssembler::lightweight_(un)lock? I think it might be better to handle the special case for cmpxchg_obj_header in another PR, is that OK for you?

If you don't mind, just add t0 in those asserts. The other asserts are also useful for the reader to what is expected without needing to trace down the entire call chain, so no need to revert anything.

Yes, sure, sHould I or you create jira issue ?

zifeihan · 2023-11-20T11:02:00Z

Hi, thanks!
Sorry with callee I meant all methods that have cmpxchg in them, such macroAssembler_riscv.cpp: MacroAssembler::lightweight_(un)lock Where this assert is also assert_different_registers(obj, hdr, tmp1, tmp2); So there are a couple of more, sorry.
There also a special cmpxchg_obj_header which still uses t0. You want to fix that in this same PR?

Hi @robehn, I am not sure if understand it correctly. Do you want me to revert my last comment and add t0 in the list of assert_different_registers in MacroAssembler::lightweight_(un)lock? I think it might be better to handle the special case for cmpxchg_obj_header in another PR, is that OK for you?

If you don't mind, just add t0 in those asserts. The other asserts are also useful for the reader to what is expected without needing to trace down the entire call chain, so no need to revert anything.

Yes, sure, sHould I or you create jira issue ?

OK, I added t0 to the assert_different_registers list in MacroAssembler::lightweight_(un)lock.
https://bugs.openjdk.org/browse/JDK-8320397 This issue is used to track avoid passing t0 as temp register to MacroAssembler::cmpxchg/cmpxchgptr, this jira issue title is ok？

robehn

Looks good, thanks!

zifeihan · 2023-11-20T13:44:12Z

@RealFYang @robehn Thanks all for the review.
/integrate

openjdk · 2023-11-20T13:46:05Z

@zifeihan
Your change (at version 8d61dc6) is now ready to be sponsored by a Committer.

RealFYang · 2023-11-20T14:17:56Z

/sponsor

openjdk · 2023-11-20T14:40:24Z

Going to push as commit a6098e4.
Since your change was applied there have been 29 commits pushed to the master branch:

60c8d9c: 8320300: Adjust hs_err output in malloc/mmap error cases
9f6a4a3: 8320386: Remove java/nio/channels/vthread/BlockingChannelOps.java#direct-register from ProblemList
db1d823: 8320168: handle setsocktopt return values
6c5e15c: 8316557: Make fields final in 'sun.util' package
de51aa1: 8283214: [macos] Screen magnifier does not show the magnified text for JcomboBox
179f505: 8320361: Doc error in RemoteRecordingStream.java
8ff7d6e: 8295391: Add discussion of binary <-> decimal conversion issues
99570fb: 8320258: Refresh building.md
a1e7a30: 8320212: Disable GCC stringop-overflow warning for affected files
0881f2b: 8318562: Computational test more than 2x slower when AVX instructions are used
... and 19 more: https://git.openjdk.org/jdk/compare/9faead1469481e268b451f2853c8fec8613426b9...master

Your commit was automatically rebased without conflicts.

openjdk · 2023-11-20T14:42:18Z

@RealFYang @zifeihan Pushed as commit a6098e4.

💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored.

8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler:…

eccb82c

…:lightweight_lock/unlock

openjdk bot added the rfr Pull request is ready for review label Nov 17, 2023

openjdk bot added the hotspot-compiler hotspot-compiler-dev@openjdk.org label Nov 17, 2023

RealFYang approved these changes Nov 17, 2023

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openjdk bot added the ready Pull request is ready to be integrated label Nov 17, 2023

robehn reviewed Nov 20, 2023

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Update some assertions for calls to MacroAssembler::lightweight_lock/…

ca4402f

…unlock

Update several assertions in MacroAssembler::lightweight_lock/unlock

8d61dc6

robehn approved these changes Nov 20, 2023

View reviewed changes

openjdk bot added the sponsor Pull request is ready to be sponsored label Nov 20, 2023

openjdk bot added the integrated Pull request has been integrated label Nov 20, 2023

openjdk bot closed this Nov 20, 2023

openjdk bot removed ready Pull request is ready to be integrated rfr Pull request is ready for review sponsor Pull request is ready to be sponsored labels Nov 20, 2023

zifeihan deleted the JDK-8320280 branch January 2, 2024 06:43

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8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock #16703

8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock #16703

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8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock #16703

8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock #16703

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