-
Notifications
You must be signed in to change notification settings - Fork 5.7k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
8322790: RISC-V: Tune costs for shuffles with no conversion #17206
Conversation
👋 Welcome back igavrilin! A progress list of the required criteria for merging this PR into |
@Ilyagavrilin The following label will be automatically applied to this pull request:
When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command. |
Webrevs
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Thanks, seems reasonable to me.
@Ilyagavrilin This change now passes all automated pre-integration checks. ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details. After integration, the commit message for the final commit will be:
You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed. At the time when this comment was updated there had been 85 new commits pushed to the
As there are no conflicts, your changes will automatically be rebased on top of these commits when integrating. If you prefer to avoid this automatic rebasing, please check the documentation for the /integrate command for further details. As you do not have Committer status in this project an existing Committer must agree to sponsor your change. Possible candidates are the reviewers of this PR (@robehn, @RealFYang) but any other Committer may sponsor as well. ➡️ To flag this PR as ready for integration with the above commit message, type |
src/hotspot/cpu/riscv/riscv.ad
Outdated
@@ -8530,7 +8531,7 @@ instruct MoveF2I_stack_reg(iRegINoSp dst, stackSlotF src) %{ | |||
|
|||
effect(DEF dst, USE src); | |||
|
|||
ins_cost(LOAD_COST); | |||
ins_cost(ALU_COST + LOAD_COST); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Adding an extra cost of ALU_COST
for these load/store nodes looks a bit strange to me. I suppose only lowering the cost for those fmv.x.w/fmv.w.x/fmv.x.d/fmv.d.x nodes will do?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
those nodes need to go below 100 which then starts looking ugly
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Seems that the performance gain is still there (tested on lichee-pi-4a board) when reverting part of the changes. I haven't checked the JIT code though. Try this addon change:
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Thanks, reverting some changes still leaves good generation. I have performed some more benchmarks on thead board, in all cases necessary instructions are generated in JIT code.
Thanks @RealFYang for suggested changes, performed some additional tests on thead board, also checked JIT code for some tests.
Additional benchmarks:
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Still reasonable to me.
@robehn @RealFYang Thanks for your reviews. |
@Ilyagavrilin |
/sponsor |
Going to push as commit 2acb5bd.
Your commit was automatically rebased without conflicts. |
@VladimirKempik @Ilyagavrilin Pushed as commit 2acb5bd. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Hi all, please review this small change to RISC-V nodes insertion costs.
Now we have several nodes which provide shuffles without conversion:
jdk/src/hotspot/cpu/riscv/riscv.ad
Lines 8525 to 8741 in 32d80e2
On most RISC-V cpu`s we prefer reg<->reg operations, because they are faster, but now stack<->reg operations used (for details about reasons, please, visit connected jbs issue).
After changing insertion costs reg<->reg operations selected, and we can see performance improvements for benchmarks, which use such shuffles (tested on thead C910 board):
New benchmark for changed nodes:
Progress
Issue
Reviewers
Reviewing
Using
git
Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/17206/head:pull/17206
$ git checkout pull/17206
Update a local copy of the PR:
$ git checkout pull/17206
$ git pull https://git.openjdk.org/jdk.git pull/17206/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 17206
View PR using the GUI difftool:
$ git pr show -t 17206
Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/17206.diff
Webrev
Link to Webrev Comment