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8329031: CPUID feature detection for Advanced Performance Extensions (Intel® APX) #18562

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8329031: CPUID feature detection for Advanced Performance Extensions (Intel® APX) #18562

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b38266c
8329031: CPUID feature detection for APX during VM initialization.
Apr 1, 2024
de7d8cb
Merge branch 'master' of http://github.com/openjdk/jdk into JDK-8329031
May 1, 2024
ad39d99
Merge branch 'master' of http://github.com/openjdk/jdk into JDK-8329031
May 18, 2024
e98b5c6
32-bit build fix
May 18, 2024
93adcc2
Making UseAPX a boolean flag.
May 18, 2024
3284fd9
Minor modification in UseAPX flag description
May 25, 2024
24baa30
Merge branch 'master' of http://github.com/openjdk/jdk into JDK-8329031
May 25, 2024
97d6538
Post merge clenups.
May 25, 2024
0881e43
Update vm_version_x86.cpp
May 31, 2024
b5da093
Review comments resolutions.
Jun 6, 2024
68df08c
Review comments addressed.
Jun 7, 2024
d8fcde9
Lazy restored state comparison after OS signal handling.
Jun 8, 2024
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7 changes: 6 additions & 1 deletion src/hotspot/cpu/x86/vm_version_x86.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -113,6 +113,10 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
address clear_apx_test_state() {
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Why do we need to clear_apx_test_state? r16 onwards are not callee saved. And checking r15 save/restore is not needed so we could remove r15 changes altogether.

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Yes, EGPRs are call clobbered registers, but here we are trying to ascertain if their values are preserved across signal handling. Explicit clearing of r16 and r31 during signal handling guarantees that preserved register values post signal handling were re-instantiated by operating system and not because they were not modified externally.

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Please, add comment about that.

# define __ _masm->
address start = __ pc();
// EGPRs are call clobbered registers, Explicit clearing of r16 and r31 during signal
// handling guarantees that preserved register values post signal handling were
// re-instantiated by operating system and not because they were not modified externally.

/* FIXME Uncomment following code after OS enablement of
bool save_apx = UseAPX;
VM_Version::set_apx_cpuFeatures();
Expand Down Expand Up @@ -1023,6 +1027,7 @@ void VM_Version::get_processor_features() {
FLAG_SET_DEFAULT(UseAVX, use_avx_limit);
}
}

if (UseAVX > use_avx_limit) {
if (UseSSE < 4) {
warning("UseAVX=%d requires UseSSE=4, setting it to UseAVX=0", UseAVX);
Expand All @@ -1046,6 +1051,7 @@ void VM_Version::get_processor_features() {
_features &= ~CPU_AVX512_VBMI2;
_features &= ~CPU_AVX512_BITALG;
_features &= ~CPU_AVX512_IFMA;
_features &= ~CPU_APX_F;
}

// Currently APX support is only enabled for targets supporting AVX512VL feature.
Expand All @@ -1056,7 +1062,6 @@ void VM_Version::get_processor_features() {
FLAG_SET_DEFAULT(UseAPX, (supports_apx_f() && supports_avx512vl()) ? true : false);
}


if (UseAVX < 2) {
_features &= ~CPU_AVX2;
_features &= ~CPU_AVX_IFMA;
Expand Down
2 changes: 1 addition & 1 deletion src/hotspot/cpu/x86/vm_version_x86.hpp
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Expand Up @@ -334,7 +334,7 @@ class VM_Version : public Abstract_VM_Version {
static address _cpuinfo_segv_addr; // address of instruction which causes SEGV
static address _cpuinfo_cont_addr; // address of instruction after the one which causes SEGV
static address _cpuinfo_segv_addr_apx; // address of instruction which causes APX specific SEGV
static address _cpuinfo_cont_addr_apx; // address of instruction which causes APX specific SEGV
static address _cpuinfo_cont_addr_apx; // address of instruction after the one which causes APX specific SEGV

/*
* Update following files when declaring new flags:
Expand Down