8345169: Implement JEP XXX: Remove the 32-bit x86 Port

src/hotspot/cpu/aarch64/c1_Defs_aarch64.hpp

@@ -32,11 +32,6 @@ enum {
   pd_hi_word_offset_in_bytes = BytesPerWord
 };
 
-// explicit rounding operations are required to implement the strictFP mode
-enum {
-  pd_strict_fp_requires_explicit_rounding = false
-};
-
 // FIXME: There are no callee-saved
 
 // registers

src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp

@@ -408,7 +408,7 @@ void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 
   arithmetic_op_fpu(x->op(), reg, left.result(), right.result());
 
-  set_result(x, round_item(reg));
+  set_result(x, reg);
 }
 
 // for  _ladd, _lmul, _lsub, _ldiv, _lrem

src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp

@@ -1402,9 +1402,6 @@ void InterpreterMacroAssembler::_interp_verify_oop(Register reg, TosState state,
   }
 }
 
-void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) { ; }
-
-
 void InterpreterMacroAssembler::notify_method_entry() {
   // Whenever JVMTI is interp_only_mode, method entry/exit events are sent to
   // track stack depth.  If it is possible to enter interp_only_mode we add

src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp

@@ -303,8 +303,6 @@ class InterpreterMacroAssembler: public MacroAssembler {
   // only if +VerifyOops && state == atos
 #define interp_verify_oop(reg, state) _interp_verify_oop(reg, state, __FILE__, __LINE__);
   void _interp_verify_oop(Register reg, TosState state, const char* file, int line);
-  // only if +VerifyFPU  && (state == ftos || state == dtos)
-  void verify_FPU(int stack_depth, TosState state = ftos);
 
   typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode;
 

src/hotspot/cpu/aarch64/matcher_aarch64.hpp

@@ -115,9 +115,6 @@
   // C code as the Java calling convention forces doubles to be aligned.
   static const bool misaligned_doubles_ok = true;
 
-  // Advertise here if the CPU requires explicit rounding operations to implement strictfp mode.
-  static const bool strict_fp_requires_explicit_rounding = false;
-
   // Are floats converted to double when stored to stack during
   // deoptimization?
   static constexpr bool float_in_double() { return false; }

src/hotspot/cpu/aarch64/templateInterpreterGenerator_aarch64.cpp

@@ -1801,12 +1801,6 @@ address TemplateInterpreterGenerator::generate_currentThread() {
   return entry_point;
 }
 
-// Not supported
-address TemplateInterpreterGenerator::generate_Float_intBitsToFloat_entry() { return nullptr; }
-address TemplateInterpreterGenerator::generate_Float_floatToRawIntBits_entry() { return nullptr; }
-address TemplateInterpreterGenerator::generate_Double_longBitsToDouble_entry() { return nullptr; }
-address TemplateInterpreterGenerator::generate_Double_doubleToRawLongBits_entry() { return nullptr; }
-
 //-----------------------------------------------------------------------------
 // Exceptions
 

src/hotspot/cpu/arm/arm.ad

@@ -4510,18 +4510,6 @@ instruct unnecessary_membar_volatile() %{
 %}
 
 //----------Register Move Instructions-----------------------------------------
-// instruct roundDouble_nop(regD dst) %{
-//   match(Set dst (RoundDouble dst));
-//   ins_pipe(empty);
-// %}
-
-
-// instruct roundFloat_nop(regF dst) %{
-//   match(Set dst (RoundFloat dst));
-//   ins_pipe(empty);
-// %}
-
-
 
 // Cast Index to Pointer for unsafe natives
 instruct castX2P(iRegX src, iRegP dst) %{

src/hotspot/cpu/arm/c1_Defs_arm.hpp

@@ -31,11 +31,6 @@ enum {
   pd_hi_word_offset_in_bytes = BytesPerWord
 };
 
-// explicit rounding operations are required to implement the strictFP mode
-enum {
-  pd_strict_fp_requires_explicit_rounding = false
-};
-
 #ifdef __SOFTFP__
 #define SOFT(n) n
 #define VFP(n)

src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp

@@ -925,7 +925,7 @@ void LIRGenerator::do_Convert(Convert* x) {
       LIRItem value(x->value(), this);
       value.load_item();
       LIR_Opr reg = rlock_result(x);
-      __ convert(x->op(), value.result(), reg, nullptr);
+      __ convert(x->op(), value.result(), reg);
       return;
     }
   }

src/hotspot/cpu/arm/interp_masm_arm.hpp

@@ -198,10 +198,6 @@ class InterpreterMacroAssembler: public MacroAssembler {
   // Debugging
   void interp_verify_oop(Register reg, TosState state, const char* file, int line);    // only if +VerifyOops && state == atos
 
-  void verify_FPU(int stack_depth, TosState state = ftos) {
-    // No VFP state verification is required for ARM
-  }
-
   // Object locking
   void lock_object  (Register lock_reg);
   void unlock_object(Register lock_reg);

src/hotspot/cpu/arm/matcher_arm.hpp

@@ -101,9 +101,6 @@
   // Java calling convention forces doubles to be aligned.
   static const bool misaligned_doubles_ok = false;
 
-  // Advertise here if the CPU requires explicit rounding operations to implement strictfp mode.
-  static const bool strict_fp_requires_explicit_rounding = false;
-
   // Are floats converted to double when stored to stack during deoptimization?
   // ARM does not handle callee-save floats.
   static constexpr bool float_in_double() {

src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp

@@ -795,10 +795,6 @@ address TemplateInterpreterGenerator::generate_currentThread() { return nullptr;
 address TemplateInterpreterGenerator::generate_CRC32_update_entry() { return nullptr; }
 address TemplateInterpreterGenerator::generate_CRC32_updateBytes_entry(AbstractInterpreter::MethodKind kind) { return nullptr; }
 address TemplateInterpreterGenerator::generate_CRC32C_updateBytes_entry(AbstractInterpreter::MethodKind kind) { return nullptr; }
-address TemplateInterpreterGenerator::generate_Float_intBitsToFloat_entry() { return nullptr; }
-address TemplateInterpreterGenerator::generate_Float_floatToRawIntBits_entry() { return nullptr; }
-address TemplateInterpreterGenerator::generate_Double_longBitsToDouble_entry() { return nullptr; }
-address TemplateInterpreterGenerator::generate_Double_doubleToRawLongBits_entry() { return nullptr; }
 address TemplateInterpreterGenerator::generate_Float_float16ToFloat_entry() { return nullptr; }
 address TemplateInterpreterGenerator::generate_Float_floatToFloat16_entry() { return nullptr; }
 

src/hotspot/cpu/ppc/c1_Defs_ppc.hpp

@@ -38,12 +38,6 @@ enum {
 };
 
 
-// Explicit rounding operations are not required to implement the strictFP mode.
-enum {
-  pd_strict_fp_requires_explicit_rounding = false
-};
-
-
 // registers
 enum {
   pd_nof_cpu_regs_frame_map = 32,              // Number of registers used during code emission.