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8347352: RISC-V: Cleanup bitwise AND assembler routines #23008
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👋 Welcome back fyang! A progress list of the required criteria for merging this PR into |
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Webrevs
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Looks more consistent now, thanks!
@feilongjiang : Thanks for the review! Could we have a Reviewer please? Maybe @Hamlin-Li @robehn ? |
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Thanks!
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Looks good.
@robehn @Hamlin-Li : Thanks for the review! I have just realized and pushed another commit making the type of immediates more consistent for several macro-assembler routines like subi/subiw. Hope the latest version still looks fine to you. |
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Still good.
Could you please re-approve? Fixed a build issue and re-run hs:tier1. Result is still clean. |
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Ship away!
Thanks all for the review! |
Going to push as commit 4f3dc9d.
Your commit was automatically rebased without conflicts. |
@RealFYang Pushed as commit 4f3dc9d. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Hi, Please consider this small refactoring work.
It's a bit strange that we have
Assembler::_and_imm12
andMacroAssembler::andi
, which is quite different from friendsAssembler::ori
andAssembler::xori
. And it doesn't seem necessary to have thisMacroAssembler::andi
which checks the immediate range. I find the immediate is within signed 12-bit range for most of the cases. One exception is in filesharedRuntime_riscv.cpp
where I think we can domv
+andr
instead.Testing on linux-riscv64:
Progress
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Using
git
Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/23008/head:pull/23008
$ git checkout pull/23008
Update a local copy of the PR:
$ git checkout pull/23008
$ git pull https://git.openjdk.org/jdk.git pull/23008/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 23008
View PR using the GUI difftool:
$ git pr show -t 23008
Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/23008.diff
Using Webrev
Link to Webrev Comment