From d93344b4159961e2a863b0640b50c5967f8a5ff4 Mon Sep 17 00:00:00 2001 From: hamlin Date: Thu, 13 Feb 2025 08:43:45 +0000 Subject: [PATCH 1/4] initial commit --- src/hotspot/cpu/riscv/riscv_v.ad | 39 +++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad index 4b30a91115221..44004824ad424 100644 --- a/src/hotspot/cpu/riscv/riscv_v.ad +++ b/src/hotspot/cpu/riscv/riscv_v.ad @@ -1,5 +1,5 @@ // -// Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2020, 2025, Oracle and/or its affiliates. All rights reserved. // Copyright (c) 2020, 2023, Arm Limited. All rights reserved. // Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -99,6 +99,8 @@ source %{ return false; } break; + case Op_SelectFromTwoVector: + return true; default: break; } @@ -109,6 +111,13 @@ source %{ if (!UseRVV) { return false; } + switch (opcode) { + case Op_SelectFromTwoVector: + // Currently, there is no selectFrom(av, bv, mask) in vector API. + return false; + default: + break; + } return match_rule_supported_vector(opcode, vlen, bt); } @@ -4425,6 +4434,34 @@ instruct vmask_reinterpret_diff_esize(vRegMask dst, vRegMask_V0 src, vReg tmp) % ins_pipe(pipe_slow); %} +// ------------------------------ Vector selectFrom ----------------------------- + +instruct select_from_two_vectors(vReg dst, vReg src1, vReg src2, vReg index, vRegMask_V0 v0, vReg tmp) %{ + match(Set dst (SelectFromTwoVector (Binary index src1) src2)); + effect(TEMP_DEF dst, TEMP v0, TEMP tmp); + format %{ "select_from_two_vectors $dst, $src1, $src2, $index" %} + ins_encode %{ + BasicType bt = Matcher::vector_element_basic_type(this); + __ vsetvli_helper(bt, Matcher::vector_length(this)); + __ vrgather_vv(as_VectorRegister($dst$$reg), as_VectorRegister($src1$$reg), + as_VectorRegister($index$$reg)); + bool use_imm = __ is_simm5(Matcher::vector_length(this) - 1); + if (use_imm) { + __ vmsgtu_vi(v0, as_VectorRegister($index$$reg), Matcher::vector_length(this) - 1); + __ vadd_vi(as_VectorRegister($tmp$$reg), as_VectorRegister($index$$reg), + -Matcher::vector_length(this), Assembler::v0_t); + } else { + __ mv(t0, Matcher::vector_length(this) - 1); + __ vmsgtu_vx(v0, as_VectorRegister($index$$reg), t0); + __ mv(t0, -Matcher::vector_length(this)); + __ vadd_vx(as_VectorRegister($tmp$$reg), as_VectorRegister($index$$reg), t0, Assembler::v0_t); + } + __ vrgather_vv(as_VectorRegister($dst$$reg), as_VectorRegister($src2$$reg), + as_VectorRegister($tmp$$reg), Assembler::v0_t); + %} + ins_pipe(pipe_slow); +%} + // ------------------------------ Vector rearrange ----------------------------- instruct rearrange(vReg dst, vReg src, vReg shuffle) %{ From a28926b6ff8fe5da9db41ab5fd4ebc69eddb5696 Mon Sep 17 00:00:00 2001 From: hamlin Date: Thu, 13 Feb 2025 14:19:48 +0000 Subject: [PATCH 2/4] comments --- src/hotspot/cpu/riscv/riscv_v.ad | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad index 44004824ad424..12d775f1c0fda 100644 --- a/src/hotspot/cpu/riscv/riscv_v.ad +++ b/src/hotspot/cpu/riscv/riscv_v.ad @@ -113,7 +113,7 @@ source %{ } switch (opcode) { case Op_SelectFromTwoVector: - // Currently, there is no selectFrom(av, bv, mask) in vector API. + // There is no masked version of selectFrom two vector, i.e. selectFrom(av, bv, mask) in vector API. return false; default: break; From e8b29c628bc8b7fdccc1fdb04ca07e7c3ade20ab Mon Sep 17 00:00:00 2001 From: hamlin Date: Mon, 17 Feb 2025 14:00:57 +0000 Subject: [PATCH 3/4] minor --- src/hotspot/cpu/riscv/riscv_v.ad | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad index 12d775f1c0fda..dc3bf998669a4 100644 --- a/src/hotspot/cpu/riscv/riscv_v.ad +++ b/src/hotspot/cpu/riscv/riscv_v.ad @@ -99,8 +99,6 @@ source %{ return false; } break; - case Op_SelectFromTwoVector: - return true; default: break; } From 086e30238c3d32454e155fd7a99b9485d8834f7e Mon Sep 17 00:00:00 2001 From: hamlin Date: Mon, 17 Feb 2025 15:09:46 +0000 Subject: [PATCH 4/4] space --- src/hotspot/cpu/riscv/riscv_v.ad | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad index dc3bf998669a4..7be169ef70982 100644 --- a/src/hotspot/cpu/riscv/riscv_v.ad +++ b/src/hotspot/cpu/riscv/riscv_v.ad @@ -4455,7 +4455,7 @@ instruct select_from_two_vectors(vReg dst, vReg src1, vReg src2, vReg index, vRe __ vadd_vx(as_VectorRegister($tmp$$reg), as_VectorRegister($index$$reg), t0, Assembler::v0_t); } __ vrgather_vv(as_VectorRegister($dst$$reg), as_VectorRegister($src2$$reg), - as_VectorRegister($tmp$$reg), Assembler::v0_t); + as_VectorRegister($tmp$$reg), Assembler::v0_t); %} ins_pipe(pipe_slow); %}