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4 changes: 2 additions & 2 deletions src/hotspot/cpu/x86/x86.ad
Original file line number Diff line number Diff line change
Expand Up @@ -10775,7 +10775,7 @@ instruct vector_slice_const_origin_LT16B_reg(vec dst, vec src1, vec src2, immI o

instruct vector_slice_const_origin_GT16B_reg(vec dst, vec src1, vec src2, immI origin, vec xtmp)
%{
predicate(!VM_Version::supports_avx512vlbw());
predicate(Matcher::vector_length_in_bytes(n) > 16 && !VM_Version::supports_avx512vlbw());
match(Set dst (VectorSlice (Binary src1 src2) origin));
effect(TEMP xtmp);
format %{ "vector_slice_const_origin $dst, $origin, $src1, $src2 \t!using $xtmp as TEMP" %}
Expand All @@ -10788,7 +10788,7 @@ instruct vector_slice_const_origin_GT16B_reg(vec dst, vec src1, vec src2, immI o

instruct vector_slice_const_origin_GT16B_reg_evex(vec dst, vec src1, vec src2, immI origin, vec xtmp)
%{
predicate(VM_Version::supports_avx512vlbw());
predicate(Matcher::vector_length_in_bytes(n) > 16 && VM_Version::supports_avx512vlbw());
match(Set dst (VectorSlice (Binary src1 src2) origin));
effect(TEMP dst, TEMP xtmp);
format %{ "vector_slice_const_origin $dst, $origin, $src1, $src2 \t!using $xtmp as TEMP" %}
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