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8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same #24431
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👋 Welcome back sparasa! A progress list of the required criteria for merging this PR into |
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@vamsi-parasa This change now passes all automated pre-integration checks. ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details. After integration, the commit message for the final commit will be: You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed. At the time when this comment was updated there had been 669 new commits pushed to the
As there are no conflicts, your changes will automatically be rebased on top of these commits when integrating. If you prefer to avoid this automatic rebasing, please check the documentation for the /integrate command for further details. As you do not have Committer status in this project an existing Committer must agree to sponsor your change. Possible candidates are the reviewers of this PR (@sviswa7, @jatin-bhateja, @eme64) but any other Committer may sponsor as well. ➡️ To flag this PR as ready for integration with the above commit message, type |
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@vamsi-parasa The following label will be automatically applied to this pull request:
When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command. |
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| bool Assembler::is_demotable(bool no_flags, int dst_enc, int nds_enc, int src_enc) { |
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src_enc is not being used in this method so could be removed.
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Please see the src_enc removed in the updated code.
| InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false); | ||
| // Encoding Format : eevex_prefix (4 bytes) | opcode_cc | modrm | ||
| int encode = evex_prefix_and_encode_ndd(0, 0, dst->encoding(), VEX_SIMD_F2, /* MAP4 */VEX_OPCODE_0F_3C, &attributes); | ||
| int encode = evex_prefix_and_encode_ndd(0, 0, dst->encoding(), VEX_SIMD_F2, /* MAP4 */VEX_OPCODE_0F_3C, &attributes); //TODO: check this |
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This should not be demoted.
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Please see the demotion disabled for esetzucc instruction in the updated code.
| InstructionAttr *attributes, bool no_flags, bool use_prefixq) { | ||
| // Demote RegRegReg instructions | ||
| if (!no_flags && dst_enc == nds_enc) { | ||
| return use_prefixq? prefixq_and_encode(dst_enc, src_enc) : prefix_and_encode(dst_enc, src_enc); |
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Nit pick, need space before ? as below:
use_prefixq ? prefixq_and_encode
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Please see the space fixed in the updated code.
| InstructionAttr *attributes, bool no_flags) { | ||
| InstructionAttr *attributes, bool no_flags, bool use_prefixq) { | ||
| // Demote RegRegReg instructions | ||
| if (!no_flags && dst_enc == nds_enc) { |
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This could be replaced by call to is_demotable().
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Please see the updated code refactored to use is_demotable().
| int Assembler::evex_prefix_and_encode_ndd(int dst_enc, int nds_enc, VexSimdPrefix pre, VexOpcode opc, | ||
| InstructionAttr *attributes, bool no_flags, bool use_prefixq) { | ||
| // Demote RegReg and RegRegImm instructions | ||
| if (!no_flags && dst_enc == nds_enc) { |
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This could be replaced by call to is_demotable().
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@vamsi-parasa this pull request can not be integrated into git checkout demotion-jdk
git fetch https://git.openjdk.org/jdk.git master
git merge FETCH_HEAD
# resolve conflicts and follow the instructions given by git merge
git commit -m "Merge master"
git push |
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Hi Vamsi, https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/x86/x86_64.ad#L14590 I have created a follow up JBS for this |
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Hi Sandhya (@sviswa7) and Jatin (@jatin-bhateja), Could you please review the refactored changes? Thanks, |
| InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false); | ||
| int encode = evex_prefix_and_encode_ndd(src1->encoding(), dst->encoding(), src2->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F_3C, &attributes); | ||
| emit_int16((0x40 | cc), (0xC0 | encode)); | ||
| evex_opcode_and_int16_ndd(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F_3C, &attributes, 0x40 | cc, 0xC0, false); |
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This could be instead call to:
evex_opcode_int16_ndd(dst->encoding(), src2->encoding(), src1->encoding(), ..)
We can remove the separate method evex_opcode_and_int16_ndd() method altogether.
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Actually, I tried implementing using only one function but due to the argument ordering changes in the inner functions, it was not possible to do it using one high level function like evex_opcode_int16_ndd.
Co-authored-by: Jatin Bhateja <jatin.bhateja@intel.com>
Co-authored-by: Jatin Bhateja <jatin.bhateja@intel.com>
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Hi Jatin (@jatin-bhateja), Incorporated the changes suggested for cpu_family and is_P6_or_later() and other minor changes. Please let me know if everything looks good. Thanks, |
sviswa7
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Updates look good.
Thanks Emanuel (@eme64)! Please let me know if there're are any issues with the tests. |
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@vamsi-parasa Testing looked good, though now you pushed some more changes. I'd like to run tests one more time before integration. Please let me know when you are ready :) |
Hi Emanuel (@eme64), Thanks for the update! The new changes got approved and are ready for testing. Thanks, |
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@vamsi-parasa Launched! |
Hi Emanuel (@eme64), Could you pls let me know when the testing is completed? Thanks, |
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We plan to integrate this PR on Monday June 2nd so as to not get very close to the upcoming fork next Thursday. |
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@vamsi-parasa @sviswa7 Testing passed! |
eme64
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Looks reasonable to me, thanks for the work!
Thanks a lot @eme64. Really appreciate all your help. |
Thank you, Emanuel! :) |
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/integrate |
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@vamsi-parasa |
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/sponsor |
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Going to push as commit fc3d3d9.
Your commit was automatically rebased without conflicts. |
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@sviswa7 @vamsi-parasa Pushed as commit fc3d3d9. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Intel APX NDD instructions are encoded using EVEX encoding. The goal of this PR is to enable optimized instruction encoding for Intel APX NDD instructions when the non-destructive destination is same as the first source.
For example:
eaddl r18, r18, r25can be encoded asaddl r18, r25using APX REX2 encodingeaddl r2, r2, r7can be encoded asaddl r2, r7using non-APX legacy encodingProgress
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gitCheckout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/24431/head:pull/24431$ git checkout pull/24431Update a local copy of the PR:
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$ git pr checkout 24431View PR using the GUI difftool:
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