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@vamsi-parasa vamsi-parasa commented Apr 4, 2025

Intel APX NDD instructions are encoded using EVEX encoding. The goal of this PR is to enable optimized instruction encoding for Intel APX NDD instructions when the non-destructive destination is same as the first source.

For example:

eaddl r18, r18, r25 can be encoded as addl r18, r25 using APX REX2 encoding
eaddl r2, r2, r7 can be encoded as addl r2, r7 using non-APX legacy encoding


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  • JDK-8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same (Sub-task - P4)

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👋 Welcome back sparasa! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

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@vamsi-parasa This change now passes all automated pre-integration checks.

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8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same

Reviewed-by: sviswanathan, jbhateja, epeter

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}
}

bool Assembler::is_demotable(bool no_flags, int dst_enc, int nds_enc, int src_enc) {
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src_enc is not being used in this method so could be removed.

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Please see the src_enc removed in the updated code.

InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
// Encoding Format : eevex_prefix (4 bytes) | opcode_cc | modrm
int encode = evex_prefix_and_encode_ndd(0, 0, dst->encoding(), VEX_SIMD_F2, /* MAP4 */VEX_OPCODE_0F_3C, &attributes);
int encode = evex_prefix_and_encode_ndd(0, 0, dst->encoding(), VEX_SIMD_F2, /* MAP4 */VEX_OPCODE_0F_3C, &attributes); //TODO: check this
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This should not be demoted.

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Please see the demotion disabled for esetzucc instruction in the updated code.

InstructionAttr *attributes, bool no_flags, bool use_prefixq) {
// Demote RegRegReg instructions
if (!no_flags && dst_enc == nds_enc) {
return use_prefixq? prefixq_and_encode(dst_enc, src_enc) : prefix_and_encode(dst_enc, src_enc);
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Nit pick, need space before ? as below:
use_prefixq ? prefixq_and_encode

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Please see the space fixed in the updated code.

InstructionAttr *attributes, bool no_flags) {
InstructionAttr *attributes, bool no_flags, bool use_prefixq) {
// Demote RegRegReg instructions
if (!no_flags && dst_enc == nds_enc) {
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This could be replaced by call to is_demotable().

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Please see the updated code refactored to use is_demotable().

int Assembler::evex_prefix_and_encode_ndd(int dst_enc, int nds_enc, VexSimdPrefix pre, VexOpcode opc,
InstructionAttr *attributes, bool no_flags, bool use_prefixq) {
// Demote RegReg and RegRegImm instructions
if (!no_flags && dst_enc == nds_enc) {
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This could be replaced by call to is_demotable().

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openjdk bot commented Apr 16, 2025

@vamsi-parasa this pull request can not be integrated into master due to one or more merge conflicts. To resolve these merge conflicts and update this pull request you can run the following commands in the local repository for your personal fork:

git checkout demotion-jdk
git fetch https://git.openjdk.org/jdk.git master
git merge FETCH_HEAD
# resolve conflicts and follow the instructions given by git merge
git commit -m "Merge master"
git push

@openjdk openjdk bot added the merge-conflict Pull request has merge conflict with target branch label Apr 16, 2025
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jatin-bhateja commented Apr 17, 2025

@openjdk openjdk bot removed the merge-conflict Pull request has merge conflict with target branch label Apr 23, 2025
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Hi Sandhya (@sviswa7) and Jatin (@jatin-bhateja),

Could you please review the refactored changes?

Thanks,
Vamsi

InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
int encode = evex_prefix_and_encode_ndd(src1->encoding(), dst->encoding(), src2->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F_3C, &attributes);
emit_int16((0x40 | cc), (0xC0 | encode));
evex_opcode_and_int16_ndd(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F_3C, &attributes, 0x40 | cc, 0xC0, false);
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This could be instead call to:
evex_opcode_int16_ndd(dst->encoding(), src2->encoding(), src1->encoding(), ..)
We can remove the separate method evex_opcode_and_int16_ndd() method altogether.

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Actually, I tried implementing using only one function but due to the argument ordering changes in the inner functions, it was not possible to do it using one high level function like evex_opcode_int16_ndd.

vamsi-parasa and others added 2 commits May 22, 2025 12:48
Co-authored-by: Jatin Bhateja <jatin.bhateja@intel.com>
Co-authored-by: Jatin Bhateja <jatin.bhateja@intel.com>
@openjdk openjdk bot removed the ready Pull request is ready to be integrated label May 22, 2025
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vamsi-parasa commented May 22, 2025

Hi Jatin (@jatin-bhateja),

Incorporated the changes suggested for cpu_family and is_P6_or_later() and other minor changes. Please let me know if everything looks good.

Thanks,
Vamsi

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Updates look good.

@openjdk openjdk bot added the ready Pull request is ready to be integrated label May 22, 2025
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vamsi-parasa commented May 23, 2025

@vamsi-parasa Testing launched, ping me again in 24h :)

Thanks Emanuel (@eme64)! Please let me know if there're are any issues with the tests.

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eme64 commented May 26, 2025

@vamsi-parasa Testing looked good, though now you pushed some more changes. I'd like to run tests one more time before integration. Please let me know when you are ready :)

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@vamsi-parasa Testing looked good, though now you pushed some more changes. I'd like to run tests one more time before integration. Please let me know when you are ready :)

Hi Emanuel (@eme64),

Thanks for the update! The new changes got approved and are ready for testing.
Could you please launch the tests?

Thanks,
Vamsi

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eme64 commented May 27, 2025

@vamsi-parasa Launched!

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@vamsi-parasa Launched!

Hi Emanuel (@eme64),

Could you pls let me know when the testing is completed?
Will integrate it if everything looks good.

Thanks,
Vamsi

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sviswa7 commented May 30, 2025

We plan to integrate this PR on Monday June 2nd so as to not get very close to the upcoming fork next Thursday.

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eme64 commented May 31, 2025

@vamsi-parasa @sviswa7 Testing passed!
We are celebrating ascension weekend, hence we may be a little less responsive than usual ;)

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Looks reasonable to me, thanks for the work!

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sviswa7 commented May 31, 2025

@vamsi-parasa @sviswa7 Testing passed! We are celebrating ascension weekend, hence we may be a little less responsive than usual ;)

Thanks a lot @eme64. Really appreciate all your help.

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@vamsi-parasa @sviswa7 Testing passed! We are celebrating ascension weekend, hence we may be a little less responsive than usual ;)

Thank you, Emanuel! :)

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/integrate

@openjdk openjdk bot added the sponsor Pull request is ready to be sponsored label May 31, 2025
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openjdk bot commented May 31, 2025

@vamsi-parasa
Your change (at version 3378eae) is now ready to be sponsored by a Committer.

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sviswa7 commented May 31, 2025

/sponsor

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openjdk bot commented May 31, 2025

Going to push as commit fc3d3d9.
Since your change was applied there have been 669 commits pushed to the master branch:

Your commit was automatically rebased without conflicts.

@openjdk openjdk bot added the integrated Pull request has been integrated label May 31, 2025
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@openjdk openjdk bot removed ready Pull request is ready to be integrated rfr Pull request is ready for review sponsor Pull request is ready to be sponsored labels May 31, 2025
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@sviswa7 @vamsi-parasa Pushed as commit fc3d3d9.

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