8351016: RA support for EVEX to REX/REX2 demotion to optimize NDD instructions#26283
8351016: RA support for EVEX to REX/REX2 demotion to optimize NDD instructions#26283jatin-bhateja wants to merge 21 commits intoopenjdk:masterfrom
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👋 Welcome back jbhateja! A progress list of the required criteria for merging this PR into |
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@jatin-bhateja This change now passes all automated pre-integration checks. ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details. After integration, the commit message for the final commit will be: You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed. At the time when this comment was updated there had been 35 new commits pushed to the
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@jatin-bhateja The pull request is being re-evaluated and the inactivity timeout has been reset. |
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This may also be applicable to non-APX instructions. For example, in the case of casting long to int, if the destination and the source are the same, then we do not need to emit any code. As a result, do you think it is better to mark operands in the ad file to preferably have the same register as the result? |
Yes, for now, I limited this to APX, but biasing the allocation of destination to non-interfering use(src) will enable instruction elision during assembling. Currently, while assigning a color(reg) to a live range, the allocator picks the first free aligned register.
There are existing DF attributions like USE_DEF which can be used to add such a constraint, but for APX NDD, we do not wish to up-front constrain the source to be the same as the destination, as it defeats the purpose, and the allocator may end up emitting a copy before the NDD instruction to honour this constraint. The idea here is to only bias color selection for non-interfering live ranges to facilitate EEVEX to REX/REX2 demotions. |
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@jatin-bhateja Thanks for looking into this.
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I can't approve this approach. I think blindly biasing the color of an operation to that of its input is too optimistic and will lead to numerous false-positive cases. It is better to have a more fine-grained selection using the script in the ad file. For example: |
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@jatin-bhateja Please do not rebase or force-push to an active PR as it invalidates existing review comments. Note for future reference, the bots always squash all changes into a single commit automatically as part of the integration. See OpenJDK Developers’ Guide for more information. |
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Hi @iwanowww , Please let me know if this is good to land now. |
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Thanks, Jatin. Overall, looks good.
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@jatin-bhateja Please do not rebase or force-push to an active PR as it invalidates existing review comments. Note for future reference, the bots always squash all changes into a single commit automatically as part of the integration. See OpenJDK Developers’ Guide for more information. |
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Thanks for clarifications, Jatin. Looks good.
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Rerunning tests and will re-approve when finished. Latest changes look good, here are a few nits (only comment and style changes): e33416a Also, thanks for your patience! |
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Hi @dlunde , waiting for your test clearance. thanks! |
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Thanks @iwanowww , @dean-long, @dlunde , @merykitty and @sviswa7 for your reviews and approval |
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/integrate |
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Going to push as commit e0311ec.
Your commit was automatically rebased without conflicts. |
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@jatin-bhateja Pushed as commit e0311ec. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Currently, while choosing the colour (register) for a definition live range during the select phase of register allocation, we pick the first available colour that does not match with already allocated neighboring live ranges.
With Intel APX NDD ISA extension, several existing two-address arithmetic instructions can now have an explicit non-destructive destination operand; this, in general, saves additional spills for two-address instructions where the destination is also the first source operand, and where the source live range surpasses the current instruction.
All NDD instructions mandate extended EVEX encoding with a bulky 4-byte prefix, JDK-8351994 added logic for NDD to REX/REX2 demotion in the assembler layer, but due to the existing first color selection register allocation policy, the demotions are rare. This patch biases the allocation of NDD definition to the first source operand or the second source operand for the commutative class of operations.
Biasing is a compile-time hint to the allocator and is different from live range coalescing (aggressive/conservative), which merges the two live ranges using the union find algorithm. Given that REX encoding needs a 1-byte prefix and REX2 encoding needs a 2-byte prefix, domotion saves considerable JIT code size.
The patch shows around 5-20% improvement in code size by facilitating NDD demotion.
For the following micro, the method JIT code size reduced from 136 to 120 bytes, which is around a 13% reduction in code size footprint.
Micro:-

Baseline :-

With opt:-

Thorough validations are underway using the latest Intel Software Development Emulator version 9.58.
Kindly review and share your feedback.
Best Regards,
Jatin
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