From ea1946de239199fa5ae9c605e5ea130a46fb78af Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Tue, 16 Sep 2025 10:30:13 -0700 Subject: [PATCH 1/6] 8367780: Enable UseAPX on Intel CPUs only when both APX_F and APX_NCI_NDD_NF cpuid features are present --- src/hotspot/cpu/x86/vm_version_x86.cpp | 27 ++++++++++++++++--- src/hotspot/cpu/x86/vm_version_x86.hpp | 24 ++++++++++++++--- .../share/classes/jdk/vm/ci/amd64/AMD64.java | 3 ++- .../bmi/verifycode/BmiIntrinsicBase.java | 2 +- .../jdk/test/whitebox/CPUInfoTest.java | 2 +- 5 files changed, 49 insertions(+), 9 deletions(-) diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp index 094ab37019018..065b5ed99633d 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.cpp +++ b/src/hotspot/cpu/x86/vm_version_x86.cpp @@ -139,7 +139,7 @@ class VM_Version_StubGenerator: public StubCodeGenerator { const uint32_t CPU_FAMILY_486 = (4 << CPU_FAMILY_SHIFT); bool use_evex = FLAG_IS_DEFAULT(UseAVX) || (UseAVX > 2); - Label detect_486, cpu486, detect_586, std_cpuid1, std_cpuid4, std_cpuid24; + Label detect_486, cpu486, detect_586, std_cpuid1, std_cpuid4, std_cpuid24, std_cpuid29; Label sef_cpuid, sefsl1_cpuid, ext_cpuid, ext_cpuid1, ext_cpuid5, ext_cpuid7; Label ext_cpuid8, done, wrapup, vector_save_restore, apx_save_restore_warning; Label legacy_setup, save_restore_except, legacy_save_restore, start_simd_check; @@ -338,6 +338,16 @@ class VM_Version_StubGenerator: public StubCodeGenerator { __ movl(Address(rsi, 0), rax); __ movl(Address(rsi, 4), rdx); + // + // cpuid(0x29) APX NCI NDD NF (EAX = 29H, ECX = 0). + // + __ bind(std_cpuid29); + __ movl(rax, 0x29); + __ movl(rcx, 0); + __ cpuid(); + __ lea(rsi, Address(rbp, in_bytes(VM_Version::std_cpuid29_offset()))); + __ movl(Address(rsi, 0), rbx); + // // cpuid(0x24) Converged Vector ISA Main Leaf (EAX = 24H, ECX = 0). // @@ -1011,13 +1021,21 @@ void VM_Version::get_processor_features() { _features.clear_feature(CPU_AVX512_BITALG); _features.clear_feature(CPU_AVX512_IFMA); _features.clear_feature(CPU_APX_F); + _features.clear_feature(CPU_APX_NCI_NDD_NF); _features.clear_feature(CPU_AVX512_FP16); _features.clear_feature(CPU_AVX10_1); _features.clear_feature(CPU_AVX10_2); } // Currently APX support is only enabled for targets supporting AVX512VL feature. - bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_avx512vl(); + bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_apx_nci_ndd_nf() && supports_avx512vl(); + if (supports_apx_nci_ndd_nf()) { + warning("APX_NCI_NDD_NF feature is detected"); + } + else { + warning("APX_NCI_NDD_NF feature is NOT detected"); + } + if (UseAPX && !apx_supported) { warning("UseAPX is not supported on this CPU, setting it to false"); FLAG_SET_DEFAULT(UseAPX, false); @@ -1025,6 +1043,7 @@ void VM_Version::get_processor_features() { if (!UseAPX) { _features.clear_feature(CPU_APX_F); + _features.clear_feature(CPU_APX_NCI_NDD_NF); } if (UseAVX < 2) { @@ -2912,8 +2931,10 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const { if (std_cpuid1_ecx.bits.popcnt != 0) vm_features.set_feature(CPU_POPCNT); if (sefsl1_cpuid7_edx.bits.apx_f != 0 && - xem_xcr0_eax.bits.apx_f != 0) { + xem_xcr0_eax.bits.apx_f != 0 && + std_cpuid29_ebx.bits.apx_nci_ndd_nf !=0) { vm_features.set_feature(CPU_APX_F); + vm_features.set_feature(CPU_APX_NCI_NDD_NF); } if (std_cpuid1_ecx.bits.avx != 0 && std_cpuid1_ecx.bits.osxsave != 0 && diff --git a/src/hotspot/cpu/x86/vm_version_x86.hpp b/src/hotspot/cpu/x86/vm_version_x86.hpp index 54b3a93d64b84..52aa1425b4d61 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.hpp +++ b/src/hotspot/cpu/x86/vm_version_x86.hpp @@ -306,6 +306,14 @@ class VM_Version : public Abstract_VM_Version { } bits; }; + union StdCpuidEax29Ecx0 { + uint32_t value; + struct { + uint32_t apx_nci_ndd_nf : 1, + : 31; + } bits; + }; + union StdCpuid24MainLeafEax { uint32_t value; struct { @@ -441,12 +449,13 @@ class VM_Version : public Abstract_VM_Version { decl(CET_SS, "cet_ss", 57) /* Control Flow Enforcement - Shadow Stack */ \ decl(AVX512_IFMA, "avx512_ifma", 58) /* Integer Vector FMA instructions*/ \ decl(AVX_IFMA, "avx_ifma", 59) /* 256-bit VEX-coded variant of AVX512-IFMA*/ \ - decl(APX_F, "apx_f", 60) /* Intel Advanced Performance Extensions*/ \ + decl(APX_F, "apx_f", 60) /* Intel Advanced Performance Extensions(APX)*/ \ decl(SHA512, "sha512", 61) /* SHA512 instructions*/ \ decl(AVX512_FP16, "avx512_fp16", 62) /* AVX512 FP16 ISA support*/ \ decl(AVX10_1, "avx10_1", 63) /* AVX10 512 bit vector ISA Version 1 support*/ \ decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/ \ - decl(HYBRID, "hybrid", 65) /* Hybrid architecture */ + decl(HYBRID, "hybrid", 65) /* Hybrid architecture */ \ + decl(APX_NCI_NDD_NF, "apx_nci_ndd_nf", 66) /* Intel APX New Conditional Instructions(NCI), New Data Destination(NDD) and No Flags(NF)*/ #define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (bit), CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG) @@ -591,6 +600,10 @@ class VM_Version : public Abstract_VM_Version { StdCpuid24MainLeafEax std_cpuid24_eax; StdCpuid24MainLeafEbx std_cpuid24_ebx; + // cpuid function 0x29 + // eax = 0x29, ecx = 0 + StdCpuidEax29Ecx0 std_cpuid29_ebx; + // cpuid function 0xB (processor topology) // ecx = 0 uint32_t tpl_cpuidB0_eax; @@ -711,6 +724,7 @@ class VM_Version : public Abstract_VM_Version { static ByteSize std_cpuid0_offset() { return byte_offset_of(CpuidInfo, std_max_function); } static ByteSize std_cpuid1_offset() { return byte_offset_of(CpuidInfo, std_cpuid1_eax); } static ByteSize std_cpuid24_offset() { return byte_offset_of(CpuidInfo, std_cpuid24_eax); } + static ByteSize std_cpuid29_offset() { return byte_offset_of(CpuidInfo, std_cpuid29_ebx); } static ByteSize dcp_cpuid4_offset() { return byte_offset_of(CpuidInfo, dcp_cpuid4_eax); } static ByteSize sef_cpuid7_offset() { return byte_offset_of(CpuidInfo, sef_cpuid7_eax); } static ByteSize sefsl1_cpuid7_offset() { return byte_offset_of(CpuidInfo, sefsl1_cpuid7_eax); } @@ -760,7 +774,10 @@ class VM_Version : public Abstract_VM_Version { _features.set_feature(CPU_SSE2); _features.set_feature(CPU_VZEROUPPER); } - static void set_apx_cpuFeatures() { _features.set_feature(CPU_APX_F); } + static void set_apx_cpuFeatures() { + _features.set_feature(CPU_APX_F); + _features.set_feature(CPU_APX_NCI_NDD_NF); + } static void set_bmi_cpuFeatures() { _features.set_feature(CPU_BMI1); _features.set_feature(CPU_BMI2); @@ -864,6 +881,7 @@ class VM_Version : public Abstract_VM_Version { static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); } static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); } static bool supports_apx_f() { return _features.supports_feature(CPU_APX_F); } + static bool supports_apx_nci_ndd_nf() { return _features.supports_feature(CPU_APX_NCI_NDD_NF); } static bool supports_avxonly() { return ((supports_avx2() || supports_avx()) && !supports_evex()); } static bool supports_sha() { return _features.supports_feature(CPU_SHA); } static bool supports_fma() { return _features.supports_feature(CPU_FMA) && supports_avx(); } diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java index 273ada6f4bc21..65aa9cec38765 100644 --- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java +++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java @@ -284,6 +284,7 @@ public enum CPUFeature implements CPUFeatureName { AVX512_IFMA, AVX_IFMA, APX_F, + APX_NCI_NDD_NF, SHA512, AVX512_FP16, AVX10_1, @@ -325,7 +326,7 @@ public EnumSet getFeatures() { @Override public List getAvailableValueRegisters() { - if (features.contains(CPUFeature.APX_F)) { + if (features.contains(CPUFeature.APX_F)) { //TODO: what change? if (features.contains(CPUFeature.AVX512F)) { return valueRegistersAVX512AndAPX; } else { diff --git a/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java b/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java index 0e8c8fe9514f2..b6ea5a4fd39ee 100644 --- a/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java +++ b/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java @@ -111,7 +111,7 @@ protected void checkCompilation(Executable executable, int level) { protected void checkEmittedCode(Executable executable) { final byte[] nativeCode = NMethod.get(executable, false).insts; final byte[] matchInstrPattern = (((BmiTestCase) testCase).getTestCaseX64() && Platform.isX64()) ? ((BmiTestCase_x64) testCase).getInstrPattern_x64() : ((BmiTestCase) testCase).getInstrPattern(); - boolean use_apx = CPUInfo.hasFeature("apx_f"); + boolean use_apx = CPUInfo.hasFeature("apx_f"); // TODO if (!((BmiTestCase) testCase).verifyPositive(nativeCode, use_apx)) { throw new AssertionError(testCase.name() + " " + "CPU instructions expected not found in nativeCode: " + Utils.toHexString(nativeCode) + " ---- Expected instrPattern: " + Utils.toHexString(matchInstrPattern)); diff --git a/test/lib-test/jdk/test/whitebox/CPUInfoTest.java b/test/lib-test/jdk/test/whitebox/CPUInfoTest.java index 809953a126365..ab3e384df5884 100644 --- a/test/lib-test/jdk/test/whitebox/CPUInfoTest.java +++ b/test/lib-test/jdk/test/whitebox/CPUInfoTest.java @@ -66,7 +66,7 @@ public class CPUInfoTest { "hv", "fsrm", "avx512_bitalg", "gfni", "f16c", "pku", "ospke", "cet_ibt", "cet_ss", "avx512_ifma", "serialize", "avx_ifma", - "apx_f", "avx10_1", "avx10_2", "avx512_fp16", + "apx_f", "apx_nci_ndd_nf", "avx10_1", "avx10_2", "avx512_fp16", "sha512", "hybrid" ); // @formatter:on From 4072cfb65a41d598ef5e0c627ca2bb15fd926122 Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Tue, 16 Sep 2025 10:59:20 -0700 Subject: [PATCH 2/6] clean up --- src/hotspot/cpu/x86/vm_version_x86.cpp | 9 +-------- src/hotspot/cpu/x86/vm_version_x86.hpp | 6 +++--- .../share/classes/jdk/vm/ci/amd64/AMD64.java | 2 +- .../intrinsics/bmi/verifycode/BmiIntrinsicBase.java | 2 +- 4 files changed, 6 insertions(+), 13 deletions(-) diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp index 065b5ed99633d..9ad3023a7554d 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.cpp +++ b/src/hotspot/cpu/x86/vm_version_x86.cpp @@ -1029,13 +1029,6 @@ void VM_Version::get_processor_features() { // Currently APX support is only enabled for targets supporting AVX512VL feature. bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_apx_nci_ndd_nf() && supports_avx512vl(); - if (supports_apx_nci_ndd_nf()) { - warning("APX_NCI_NDD_NF feature is detected"); - } - else { - warning("APX_NCI_NDD_NF feature is NOT detected"); - } - if (UseAPX && !apx_supported) { warning("UseAPX is not supported on this CPU, setting it to false"); FLAG_SET_DEFAULT(UseAPX, false); @@ -2932,7 +2925,7 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const { vm_features.set_feature(CPU_POPCNT); if (sefsl1_cpuid7_edx.bits.apx_f != 0 && xem_xcr0_eax.bits.apx_f != 0 && - std_cpuid29_ebx.bits.apx_nci_ndd_nf !=0) { + std_cpuid29_ebx.bits.apx_nci_ndd_nf != 0) { vm_features.set_feature(CPU_APX_F); vm_features.set_feature(CPU_APX_NCI_NDD_NF); } diff --git a/src/hotspot/cpu/x86/vm_version_x86.hpp b/src/hotspot/cpu/x86/vm_version_x86.hpp index 52aa1425b4d61..ad7807b84b074 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.hpp +++ b/src/hotspot/cpu/x86/vm_version_x86.hpp @@ -600,7 +600,7 @@ class VM_Version : public Abstract_VM_Version { StdCpuid24MainLeafEax std_cpuid24_eax; StdCpuid24MainLeafEbx std_cpuid24_ebx; - // cpuid function 0x29 + // cpuid function 0x29 APX Advanced Performance Extensions Leaf // eax = 0x29, ecx = 0 StdCpuidEax29Ecx0 std_cpuid29_ebx; @@ -774,9 +774,9 @@ class VM_Version : public Abstract_VM_Version { _features.set_feature(CPU_SSE2); _features.set_feature(CPU_VZEROUPPER); } - static void set_apx_cpuFeatures() { + static void set_apx_cpuFeatures() { _features.set_feature(CPU_APX_F); - _features.set_feature(CPU_APX_NCI_NDD_NF); + _features.set_feature(CPU_APX_NCI_NDD_NF); } static void set_bmi_cpuFeatures() { _features.set_feature(CPU_BMI1); diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java index 65aa9cec38765..409ecb3f57b49 100644 --- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java +++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java @@ -326,7 +326,7 @@ public EnumSet getFeatures() { @Override public List getAvailableValueRegisters() { - if (features.contains(CPUFeature.APX_F)) { //TODO: what change? + if (features.contains(CPUFeature.APX_F)) { if (features.contains(CPUFeature.AVX512F)) { return valueRegistersAVX512AndAPX; } else { diff --git a/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java b/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java index b6ea5a4fd39ee..0e8c8fe9514f2 100644 --- a/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java +++ b/test/hotspot/jtreg/compiler/intrinsics/bmi/verifycode/BmiIntrinsicBase.java @@ -111,7 +111,7 @@ protected void checkCompilation(Executable executable, int level) { protected void checkEmittedCode(Executable executable) { final byte[] nativeCode = NMethod.get(executable, false).insts; final byte[] matchInstrPattern = (((BmiTestCase) testCase).getTestCaseX64() && Platform.isX64()) ? ((BmiTestCase_x64) testCase).getInstrPattern_x64() : ((BmiTestCase) testCase).getInstrPattern(); - boolean use_apx = CPUInfo.hasFeature("apx_f"); // TODO + boolean use_apx = CPUInfo.hasFeature("apx_f"); if (!((BmiTestCase) testCase).verifyPositive(nativeCode, use_apx)) { throw new AssertionError(testCase.name() + " " + "CPU instructions expected not found in nativeCode: " + Utils.toHexString(nativeCode) + " ---- Expected instrPattern: " + Utils.toHexString(matchInstrPattern)); From 87e96cca59c4b3ee62f546a25ae9d7880ad9aefb Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Tue, 16 Sep 2025 12:10:49 -0700 Subject: [PATCH 3/6] integrate latest changes --- src/hotspot/cpu/x86/vm_version_x86.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp index 1fc3dec362d46..75335929c2a66 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.cpp +++ b/src/hotspot/cpu/x86/vm_version_x86.cpp @@ -1071,7 +1071,7 @@ void VM_Version::get_processor_features() { } // Currently APX support is only enabled for targets supporting AVX512VL feature. - bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_avx512vl(); + bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_apx_nci_ndd_nf() && supports_avx512vl(); if (UseAPX && !apx_supported) { warning("UseAPX is not supported on this CPU, setting it to false"); FLAG_SET_DEFAULT(UseAPX, false); @@ -1079,6 +1079,7 @@ void VM_Version::get_processor_features() { if (!UseAPX) { _features.clear_feature(CPU_APX_F); + _features.clear_feature(CPU_APX_NCI_NDD_NF); } if (FLAG_IS_DEFAULT(IntelJccErratumMitigation)) { From 21560d0b28cac0f914e18417e237a7f725bdc684 Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Tue, 16 Sep 2025 12:15:34 -0700 Subject: [PATCH 4/6] update KNL check --- src/hotspot/cpu/x86/vm_version_x86.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp index 75335929c2a66..89b06119a906b 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.cpp +++ b/src/hotspot/cpu/x86/vm_version_x86.cpp @@ -1051,6 +1051,7 @@ void VM_Version::get_processor_features() { _features.clear_feature(CPU_AVX512BW); _features.clear_feature(CPU_AVX512VL); _features.clear_feature(CPU_APX_F); + _features.clear_feature(CPU_APX_NCI_NDD_NF); _features.clear_feature(CPU_AVX512DQ); _features.clear_feature(CPU_AVX512_VNNI); _features.clear_feature(CPU_AVX512_VAES); From 4e7a183a40a54d84cf55bfd44a44337e3a411552 Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Wed, 17 Sep 2025 10:48:01 -0700 Subject: [PATCH 5/6] Remove APX_NCI_NDD_NF as an explicit feature --- src/hotspot/cpu/x86/vm_version_x86.cpp | 6 +----- src/hotspot/cpu/x86/vm_version_x86.hpp | 7 ++----- .../share/classes/jdk/vm/ci/amd64/AMD64.java | 1 - test/lib-test/jdk/test/whitebox/CPUInfoTest.java | 2 +- 4 files changed, 4 insertions(+), 12 deletions(-) diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp index 89b06119a906b..f0dfdb2274567 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.cpp +++ b/src/hotspot/cpu/x86/vm_version_x86.cpp @@ -1021,7 +1021,6 @@ void VM_Version::get_processor_features() { _features.clear_feature(CPU_AVX512_BITALG); _features.clear_feature(CPU_AVX512_IFMA); _features.clear_feature(CPU_APX_F); - _features.clear_feature(CPU_APX_NCI_NDD_NF); _features.clear_feature(CPU_AVX512_FP16); _features.clear_feature(CPU_AVX10_1); _features.clear_feature(CPU_AVX10_2); @@ -1051,7 +1050,6 @@ void VM_Version::get_processor_features() { _features.clear_feature(CPU_AVX512BW); _features.clear_feature(CPU_AVX512VL); _features.clear_feature(CPU_APX_F); - _features.clear_feature(CPU_APX_NCI_NDD_NF); _features.clear_feature(CPU_AVX512DQ); _features.clear_feature(CPU_AVX512_VNNI); _features.clear_feature(CPU_AVX512_VAES); @@ -1072,7 +1070,7 @@ void VM_Version::get_processor_features() { } // Currently APX support is only enabled for targets supporting AVX512VL feature. - bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_apx_nci_ndd_nf() && supports_avx512vl(); + bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_avx512vl(); if (UseAPX && !apx_supported) { warning("UseAPX is not supported on this CPU, setting it to false"); FLAG_SET_DEFAULT(UseAPX, false); @@ -1080,7 +1078,6 @@ void VM_Version::get_processor_features() { if (!UseAPX) { _features.clear_feature(CPU_APX_F); - _features.clear_feature(CPU_APX_NCI_NDD_NF); } if (FLAG_IS_DEFAULT(IntelJccErratumMitigation)) { @@ -2930,7 +2927,6 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const { xem_xcr0_eax.bits.apx_f != 0 && std_cpuid29_ebx.bits.apx_nci_ndd_nf != 0) { vm_features.set_feature(CPU_APX_F); - vm_features.set_feature(CPU_APX_NCI_NDD_NF); } if (std_cpuid1_ecx.bits.avx != 0 && std_cpuid1_ecx.bits.osxsave != 0 && diff --git a/src/hotspot/cpu/x86/vm_version_x86.hpp b/src/hotspot/cpu/x86/vm_version_x86.hpp index ad7807b84b074..cd8e957ca9a7b 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.hpp +++ b/src/hotspot/cpu/x86/vm_version_x86.hpp @@ -449,13 +449,12 @@ class VM_Version : public Abstract_VM_Version { decl(CET_SS, "cet_ss", 57) /* Control Flow Enforcement - Shadow Stack */ \ decl(AVX512_IFMA, "avx512_ifma", 58) /* Integer Vector FMA instructions*/ \ decl(AVX_IFMA, "avx_ifma", 59) /* 256-bit VEX-coded variant of AVX512-IFMA*/ \ - decl(APX_F, "apx_f", 60) /* Intel Advanced Performance Extensions(APX)*/ \ + decl(APX_F, "apx_f", 60) /* Intel Advanced Performance Extensions*/ \ decl(SHA512, "sha512", 61) /* SHA512 instructions*/ \ decl(AVX512_FP16, "avx512_fp16", 62) /* AVX512 FP16 ISA support*/ \ decl(AVX10_1, "avx10_1", 63) /* AVX10 512 bit vector ISA Version 1 support*/ \ decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/ \ - decl(HYBRID, "hybrid", 65) /* Hybrid architecture */ \ - decl(APX_NCI_NDD_NF, "apx_nci_ndd_nf", 66) /* Intel APX New Conditional Instructions(NCI), New Data Destination(NDD) and No Flags(NF)*/ + decl(HYBRID, "hybrid", 65) /* Hybrid architecture */ #define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (bit), CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG) @@ -776,7 +775,6 @@ class VM_Version : public Abstract_VM_Version { } static void set_apx_cpuFeatures() { _features.set_feature(CPU_APX_F); - _features.set_feature(CPU_APX_NCI_NDD_NF); } static void set_bmi_cpuFeatures() { _features.set_feature(CPU_BMI1); @@ -881,7 +879,6 @@ class VM_Version : public Abstract_VM_Version { static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); } static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); } static bool supports_apx_f() { return _features.supports_feature(CPU_APX_F); } - static bool supports_apx_nci_ndd_nf() { return _features.supports_feature(CPU_APX_NCI_NDD_NF); } static bool supports_avxonly() { return ((supports_avx2() || supports_avx()) && !supports_evex()); } static bool supports_sha() { return _features.supports_feature(CPU_SHA); } static bool supports_fma() { return _features.supports_feature(CPU_FMA) && supports_avx(); } diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java index 409ecb3f57b49..273ada6f4bc21 100644 --- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java +++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java @@ -284,7 +284,6 @@ public enum CPUFeature implements CPUFeatureName { AVX512_IFMA, AVX_IFMA, APX_F, - APX_NCI_NDD_NF, SHA512, AVX512_FP16, AVX10_1, diff --git a/test/lib-test/jdk/test/whitebox/CPUInfoTest.java b/test/lib-test/jdk/test/whitebox/CPUInfoTest.java index ab3e384df5884..76f3dbec76f8f 100644 --- a/test/lib-test/jdk/test/whitebox/CPUInfoTest.java +++ b/test/lib-test/jdk/test/whitebox/CPUInfoTest.java @@ -66,7 +66,7 @@ public class CPUInfoTest { "hv", "fsrm", "avx512_bitalg", "gfni", "f16c", "pku", "ospke", "cet_ibt", "cet_ss", "avx512_ifma", "serialize", "avx_ifma", - "apx_f", "apx_nci_ndd_nf", "avx10_1", "avx10_2", "avx512_fp16", + "apx_f", "avx10_1", "avx10_2", "avx512_fp16", "sha512", "hybrid" ); // @formatter:on From 91f589ab3f8f827cb3e88706ea668201ea6c1582 Mon Sep 17 00:00:00 2001 From: Srinivas Vamsi Parasa Date: Wed, 17 Sep 2025 10:50:02 -0700 Subject: [PATCH 6/6] Update CPUInfoTest.java --- test/lib-test/jdk/test/whitebox/CPUInfoTest.java | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/lib-test/jdk/test/whitebox/CPUInfoTest.java b/test/lib-test/jdk/test/whitebox/CPUInfoTest.java index 76f3dbec76f8f..809953a126365 100644 --- a/test/lib-test/jdk/test/whitebox/CPUInfoTest.java +++ b/test/lib-test/jdk/test/whitebox/CPUInfoTest.java @@ -66,7 +66,7 @@ public class CPUInfoTest { "hv", "fsrm", "avx512_bitalg", "gfni", "f16c", "pku", "ospke", "cet_ibt", "cet_ss", "avx512_ifma", "serialize", "avx_ifma", - "apx_f", "avx10_1", "avx10_2", "avx512_fp16", + "apx_f", "avx10_1", "avx10_2", "avx512_fp16", "sha512", "hybrid" ); // @formatter:on