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15 changes: 13 additions & 2 deletions src/hotspot/cpu/x86/vm_version_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -139,7 +139,7 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
const uint32_t CPU_FAMILY_486 = (4 << CPU_FAMILY_SHIFT);
bool use_evex = FLAG_IS_DEFAULT(UseAVX) || (UseAVX > 2);

Label detect_486, cpu486, detect_586, std_cpuid1, std_cpuid4, std_cpuid24;
Label detect_486, cpu486, detect_586, std_cpuid1, std_cpuid4, std_cpuid24, std_cpuid29;
Label sef_cpuid, sefsl1_cpuid, ext_cpuid, ext_cpuid1, ext_cpuid5, ext_cpuid7;
Label ext_cpuid8, done, wrapup, vector_save_restore, apx_save_restore_warning;
Label legacy_setup, save_restore_except, legacy_save_restore, start_simd_check;
Expand Down Expand Up @@ -338,6 +338,16 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
__ movl(Address(rsi, 0), rax);
__ movl(Address(rsi, 4), rdx);

//
// cpuid(0x29) APX NCI NDD NF (EAX = 29H, ECX = 0).
//
__ bind(std_cpuid29);
__ movl(rax, 0x29);
__ movl(rcx, 0);
__ cpuid();
__ lea(rsi, Address(rbp, in_bytes(VM_Version::std_cpuid29_offset())));
__ movl(Address(rsi, 0), rbx);

//
// cpuid(0x24) Converged Vector ISA Main Leaf (EAX = 24H, ECX = 0).
//
Expand Down Expand Up @@ -2914,7 +2924,8 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const {
if (std_cpuid1_ecx.bits.popcnt != 0)
vm_features.set_feature(CPU_POPCNT);
if (sefsl1_cpuid7_edx.bits.apx_f != 0 &&
xem_xcr0_eax.bits.apx_f != 0) {
xem_xcr0_eax.bits.apx_f != 0 &&
std_cpuid29_ebx.bits.apx_nci_ndd_nf != 0) {
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was confused why the previous implementation was 'wrong'.. Please clarify that this was triggered "because" of the update to the spec (in the PR description).

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Please see the updated PR description which clarifies that this PR was triggered because of the update to the Intel APX spec.

vm_features.set_feature(CPU_APX_F);
}
if (std_cpuid1_ecx.bits.avx != 0 &&
Expand Down
17 changes: 16 additions & 1 deletion src/hotspot/cpu/x86/vm_version_x86.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -306,6 +306,14 @@ class VM_Version : public Abstract_VM_Version {
} bits;
};

union StdCpuidEax29Ecx0 {
uint32_t value;
struct {
uint32_t apx_nci_ndd_nf : 1,
: 31;
} bits;
};

union StdCpuid24MainLeafEax {
uint32_t value;
struct {
Expand Down Expand Up @@ -591,6 +599,10 @@ class VM_Version : public Abstract_VM_Version {
StdCpuid24MainLeafEax std_cpuid24_eax;
StdCpuid24MainLeafEbx std_cpuid24_ebx;

// cpuid function 0x29 APX Advanced Performance Extensions Leaf
// eax = 0x29, ecx = 0
StdCpuidEax29Ecx0 std_cpuid29_ebx;

// cpuid function 0xB (processor topology)
// ecx = 0
uint32_t tpl_cpuidB0_eax;
Expand Down Expand Up @@ -711,6 +723,7 @@ class VM_Version : public Abstract_VM_Version {
static ByteSize std_cpuid0_offset() { return byte_offset_of(CpuidInfo, std_max_function); }
static ByteSize std_cpuid1_offset() { return byte_offset_of(CpuidInfo, std_cpuid1_eax); }
static ByteSize std_cpuid24_offset() { return byte_offset_of(CpuidInfo, std_cpuid24_eax); }
static ByteSize std_cpuid29_offset() { return byte_offset_of(CpuidInfo, std_cpuid29_ebx); }
static ByteSize dcp_cpuid4_offset() { return byte_offset_of(CpuidInfo, dcp_cpuid4_eax); }
static ByteSize sef_cpuid7_offset() { return byte_offset_of(CpuidInfo, sef_cpuid7_eax); }
static ByteSize sefsl1_cpuid7_offset() { return byte_offset_of(CpuidInfo, sefsl1_cpuid7_eax); }
Expand Down Expand Up @@ -760,7 +773,9 @@ class VM_Version : public Abstract_VM_Version {
_features.set_feature(CPU_SSE2);
_features.set_feature(CPU_VZEROUPPER);
}
static void set_apx_cpuFeatures() { _features.set_feature(CPU_APX_F); }
static void set_apx_cpuFeatures() {
_features.set_feature(CPU_APX_F);
}
static void set_bmi_cpuFeatures() {
_features.set_feature(CPU_BMI1);
_features.set_feature(CPU_BMI2);
Expand Down