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8367780: Enable UseAPX on Intel CPUs only when both APX_F and APX_NCI_NDD_NF cpuid features are present #27320

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8367780: Enable UseAPX on Intel CPUs only when both APX_F and APX_NCI_NDD_NF cpuid features are present #27320

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ea1946d
8367780: Enable UseAPX on Intel CPUs only when both APX_F and APX_NCI…
vamsi-parasa Sep 16, 2025
4072cfb
clean up
vamsi-parasa Sep 16, 2025
4bf728c
merge master
vamsi-parasa Sep 16, 2025
87e96cc
integrate latest changes
vamsi-parasa Sep 16, 2025
21560d0
update KNL check
vamsi-parasa Sep 16, 2025
4e7a183
Remove APX_NCI_NDD_NF as an explicit feature
vamsi-parasa Sep 17, 2025
91f589a
Update CPUInfoTest.java
vamsi-parasa Sep 17, 2025
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6 changes: 1 addition & 5 deletions src/hotspot/cpu/x86/vm_version_x86.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1021,7 +1021,6 @@ void VM_Version::get_processor_features() {
_features.clear_feature(CPU_AVX512_BITALG);
_features.clear_feature(CPU_AVX512_IFMA);
_features.clear_feature(CPU_APX_F);
_features.clear_feature(CPU_APX_NCI_NDD_NF);
_features.clear_feature(CPU_AVX512_FP16);
_features.clear_feature(CPU_AVX10_1);
_features.clear_feature(CPU_AVX10_2);
Expand Down Expand Up @@ -1051,7 +1050,6 @@ void VM_Version::get_processor_features() {
_features.clear_feature(CPU_AVX512BW);
_features.clear_feature(CPU_AVX512VL);
_features.clear_feature(CPU_APX_F);
_features.clear_feature(CPU_APX_NCI_NDD_NF);
_features.clear_feature(CPU_AVX512DQ);
_features.clear_feature(CPU_AVX512_VNNI);
_features.clear_feature(CPU_AVX512_VAES);
Expand All @@ -1072,15 +1070,14 @@ void VM_Version::get_processor_features() {
}

// Currently APX support is only enabled for targets supporting AVX512VL feature.
bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_apx_nci_ndd_nf() && supports_avx512vl();
bool apx_supported = os_supports_apx_egprs() && supports_apx_f() && supports_avx512vl();
if (UseAPX && !apx_supported) {
warning("UseAPX is not supported on this CPU, setting it to false");
FLAG_SET_DEFAULT(UseAPX, false);
}

if (!UseAPX) {
_features.clear_feature(CPU_APX_F);
_features.clear_feature(CPU_APX_NCI_NDD_NF);
}

if (FLAG_IS_DEFAULT(IntelJccErratumMitigation)) {
Expand Down Expand Up @@ -2930,7 +2927,6 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const {
xem_xcr0_eax.bits.apx_f != 0 &&
std_cpuid29_ebx.bits.apx_nci_ndd_nf != 0) {
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was confused why the previous implementation was 'wrong'.. Please clarify that this was triggered "because" of the update to the spec (in the PR description).

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Please see the updated PR description which clarifies that this PR was triggered because of the update to the Intel APX spec.

vm_features.set_feature(CPU_APX_F);
vm_features.set_feature(CPU_APX_NCI_NDD_NF);
}
if (std_cpuid1_ecx.bits.avx != 0 &&
std_cpuid1_ecx.bits.osxsave != 0 &&
Expand Down
7 changes: 2 additions & 5 deletions src/hotspot/cpu/x86/vm_version_x86.hpp
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Expand Up @@ -449,13 +449,12 @@ class VM_Version : public Abstract_VM_Version {
decl(CET_SS, "cet_ss", 57) /* Control Flow Enforcement - Shadow Stack */ \
decl(AVX512_IFMA, "avx512_ifma", 58) /* Integer Vector FMA instructions*/ \
decl(AVX_IFMA, "avx_ifma", 59) /* 256-bit VEX-coded variant of AVX512-IFMA*/ \
decl(APX_F, "apx_f", 60) /* Intel Advanced Performance Extensions(APX)*/ \
decl(APX_F, "apx_f", 60) /* Intel Advanced Performance Extensions*/ \
decl(SHA512, "sha512", 61) /* SHA512 instructions*/ \
decl(AVX512_FP16, "avx512_fp16", 62) /* AVX512 FP16 ISA support*/ \
decl(AVX10_1, "avx10_1", 63) /* AVX10 512 bit vector ISA Version 1 support*/ \
decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/ \
decl(HYBRID, "hybrid", 65) /* Hybrid architecture */ \
decl(APX_NCI_NDD_NF, "apx_nci_ndd_nf", 66) /* Intel APX New Conditional Instructions(NCI), New Data Destination(NDD) and No Flags(NF)*/
decl(HYBRID, "hybrid", 65) /* Hybrid architecture */

#define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (bit),
CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG)
Expand Down Expand Up @@ -776,7 +775,6 @@ class VM_Version : public Abstract_VM_Version {
}
static void set_apx_cpuFeatures() {
_features.set_feature(CPU_APX_F);
_features.set_feature(CPU_APX_NCI_NDD_NF);
}
static void set_bmi_cpuFeatures() {
_features.set_feature(CPU_BMI1);
Expand Down Expand Up @@ -881,7 +879,6 @@ class VM_Version : public Abstract_VM_Version {
static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); }
static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); }
static bool supports_apx_f() { return _features.supports_feature(CPU_APX_F); }
static bool supports_apx_nci_ndd_nf() { return _features.supports_feature(CPU_APX_NCI_NDD_NF); }
static bool supports_avxonly() { return ((supports_avx2() || supports_avx()) && !supports_evex()); }
static bool supports_sha() { return _features.supports_feature(CPU_SHA); }
static bool supports_fma() { return _features.supports_feature(CPU_FMA) && supports_avx(); }
Expand Down
1 change: 0 additions & 1 deletion src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java
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Expand Up @@ -284,7 +284,6 @@ public enum CPUFeature implements CPUFeatureName {
AVX512_IFMA,
AVX_IFMA,
APX_F,
APX_NCI_NDD_NF,
SHA512,
AVX512_FP16,
AVX10_1,
Expand Down
2 changes: 1 addition & 1 deletion test/lib-test/jdk/test/whitebox/CPUInfoTest.java
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Expand Up @@ -66,7 +66,7 @@ public class CPUInfoTest {
"hv", "fsrm", "avx512_bitalg", "gfni",
"f16c", "pku", "ospke", "cet_ibt",
"cet_ss", "avx512_ifma", "serialize", "avx_ifma",
"apx_f", "apx_nci_ndd_nf", "avx10_1", "avx10_2", "avx512_fp16",
"apx_f", "avx10_1", "avx10_2", "avx512_fp16",
"sha512", "hybrid"
);
// @formatter:on
Expand Down