From 7cf4e88e134e51edb78ce82b9ac7eff7b414e233 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Tue, 23 Sep 2025 15:17:32 +0800 Subject: [PATCH] 8368366: RISC-V: AlignVector is mistakenly set to AvoidUnalignedAccesses --- src/hotspot/cpu/riscv/vm_version_riscv.cpp | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp index e0c3b30375035..1bb9509cdde01 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp @@ -477,10 +477,6 @@ void VM_Version::c2_initialize() { warning("AES/CTR intrinsics are not available on this CPU"); FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); } - - if (FLAG_IS_DEFAULT(AlignVector)) { - FLAG_SET_DEFAULT(AlignVector, AvoidUnalignedAccesses); - } } #endif // COMPILER2