From 077a3ba378611692e6952881679063321f00ffd8 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Fri, 26 Sep 2025 15:35:48 +0800 Subject: [PATCH 1/7] 8368732: RISC-V: Detect support for misaligned vector access via hwprobe --- src/hotspot/cpu/riscv/vm_version_riscv.cpp | 9 +++-- src/hotspot/cpu/riscv/vm_version_riscv.hpp | 15 ++++++-- .../os_cpu/linux_riscv/riscv_hwprobe.cpp | 35 ++++++++++++++++--- .../linux_riscv/vm_version_linux_riscv.cpp | 2 +- 4 files changed, 51 insertions(+), 10 deletions(-) diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp index 87366116b3b68..827eb4dab8985 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp @@ -160,7 +160,7 @@ void VM_Version::common_initialize() { if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) { FLAG_SET_DEFAULT(AvoidUnalignedAccesses, - unaligned_access.value() != MISALIGNED_FAST); + unaligned_scalar.value() != MISALIGNED_FAST); } if (!AvoidUnalignedAccesses) { @@ -175,7 +175,12 @@ void VM_Version::common_initialize() { // This machine has fast unaligned memory accesses if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { FLAG_SET_DEFAULT(UseUnalignedAccesses, - unaligned_access.value() == MISALIGNED_FAST); + (unaligned_scalar.value() == MISALIGNED_FAST)); + } + + if (FLAG_IS_DEFAULT(AlignVector) && unaligned_vector.enabled()) { + FLAG_SET_DEFAULT(AlignVector, + unaligned_vector.value() != RISCV_HWPROBE_MISALIGNED_VECTOR_FAST); } #ifdef __riscv_ztso diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.hpp b/src/hotspot/cpu/riscv/vm_version_riscv.hpp index aec975d27bef3..a453c93e3365c 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.hpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.hpp @@ -191,7 +191,8 @@ class VM_Version : public Abstract_VM_Version { // mvendorid Manufactory JEDEC id encoded, ISA vol 2 3.1.2.. // marchid Id for microarch. Mvendorid plus marchid uniquely identify the microarch. // mimpid A unique encoding of the version of the processor implementation. - // unaligned_access Unaligned memory accesses (unknown, unspported, emulated, slow, firmware, fast) + // unaligned_scalar Performance of misaligned scalar accesses (unknown, emulated, slow, fast, unsupported) + // unaligned_vector Performance of misaligned vector accesses (unknown, unspported, slow, fast) // satp mode SATP bits (number of virtual addr bits) mbare, sv39, sv48, sv57, sv64 public: @@ -251,11 +252,12 @@ class VM_Version : public Abstract_VM_Version { // Non-extension features // #define RV_NON_EXT_FEATURE_FLAGS(decl) \ - decl(unaligned_access , Unaligned , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ decl(mvendorid , VendorId , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ decl(marchid , ArchId , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ decl(mimpid , ImpId , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ decl(satp_mode , SATP , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ + decl(unaligned_scalar , UnalignedScalar , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ + decl(unaligned_vector , UnalignedVector , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ decl(zicboz_block_size, ZicbozBlockSize , RV_NO_FLAG_BIT, false, NO_UPDATE_DEFAULT) \ #define DECLARE_RV_NON_EXT_FEATURE(NAME, PRETTY, LINUX_BIT, FSTRING, FLAGF) \ @@ -396,7 +398,7 @@ class VM_Version : public Abstract_VM_Version { static VM_MODE parse_satp_mode(const char* vm_mode); // Values from riscv_hwprobe() - enum UNALIGNED_ACCESS : int { + enum UNALIGNED_SCALAR_ACCESS : int { MISALIGNED_UNKNOWN = 0, MISALIGNED_EMULATED = 1, MISALIGNED_SLOW = 2, @@ -404,6 +406,13 @@ class VM_Version : public Abstract_VM_Version { MISALIGNED_UNSUPPORTED = 4 }; + enum UNALIGNED_VECTOR_ACCESS : int { + RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN = 0, + RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW = 2, + RISCV_HWPROBE_MISALIGNED_VECTOR_FAST = 3, + RISCV_HWPROBE_MISALIGNED_VECTOR__UNSUPPORTED = 4 + }; + // Null terminated list static RVFeatureValue* _feature_list[]; static RVExtFeatures* _rv_ext_features; diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp index 3e5fb4610deb5..4613678e0f5e5 100644 --- a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp +++ b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp @@ -81,7 +81,7 @@ #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35) -#define RISCV_HWPROBE_KEY_CPUPERF_0 5 +#define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) #define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0) @@ -89,7 +89,24 @@ #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0) #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) -#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 +#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 + +#define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7 + +#define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8 + +#define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF 9 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4 + +#define RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF 10 +#define RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN 0 +#define RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW 2 +#define RISCV_HWPROBE_MISALIGNED_VECTOR_FAST 3 +#define RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED 4 #ifndef NR_riscv_hwprobe #ifndef NR_arch_specific_syscall @@ -117,7 +134,11 @@ static struct riscv_hwprobe query[] = {{RISCV_HWPROBE_KEY_MVENDORID, 0}, {RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0}, {RISCV_HWPROBE_KEY_IMA_EXT_0, 0}, {RISCV_HWPROBE_KEY_CPUPERF_0, 0}, - {RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE, 0}}; + {RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE, 0}, + {RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS, 0}, + {RISCV_HWPROBE_KEY_TIME_CSR_FREQ, 0}, + {RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF, 0}, + {RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF, 0}}; bool RiscvHwprobe::probe_features() { assert(!rw_hwprobe_completed, "Called twice."); @@ -246,10 +267,16 @@ void RiscvHwprobe::add_features_from_query_result() { VM_Version::ext_Zicond.enable_feature(); } #endif + // RISCV_HWPROBE_KEY_CPUPERF_0 is deprecated. Keep it there for backward + // compatibility with old kernels. if (is_valid(RISCV_HWPROBE_KEY_CPUPERF_0)) { - VM_Version::unaligned_access.enable_feature( + VM_Version::unaligned_scalar.enable_feature( query[RISCV_HWPROBE_KEY_CPUPERF_0].value & RISCV_HWPROBE_MISALIGNED_MASK); } + if (is_valid(RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF)) { + VM_Version::unaligned_vector.enable_feature( + query[RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF].value); + } if (is_valid(RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE)) { VM_Version::zicboz_block_size.enable_feature(query[RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE].value); } diff --git a/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp b/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp index cf9429b6bea69..b2c46f4a4e8d0 100644 --- a/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp +++ b/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp @@ -303,7 +303,7 @@ void VM_Version::rivos_features() { ext_Zvfh.enable_feature(); - unaligned_access.enable_feature(MISALIGNED_FAST); + unaligned_scalar.enable_feature(MISALIGNED_FAST); satp_mode.enable_feature(VM_SV48); // Features dependent on march/mimpid. From 1912cdfedc3ae5ad75a1f04610558040e71d7ad3 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Fri, 26 Sep 2025 15:45:44 +0800 Subject: [PATCH 2/7] White spaces --- src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp index 4613678e0f5e5..ae1d9fe294345 100644 --- a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp +++ b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp @@ -81,7 +81,7 @@ #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35) -#define RISCV_HWPROBE_KEY_CPUPERF_0 5 +#define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) #define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0) @@ -91,7 +91,7 @@ #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 -#define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7 +#define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7 #define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8 From 45cbcd9e5cc1ed24053765a7c5b2764a04fc402a Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Fri, 26 Sep 2025 16:03:01 +0800 Subject: [PATCH 3/7] More white spaces --- src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp index ae1d9fe294345..42264f274e22a 100644 --- a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp +++ b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp @@ -93,14 +93,14 @@ #define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7 -#define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8 +#define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8 #define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF 9 -#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0 -#define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1 -#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2 -#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3 -#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3 +#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4 #define RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF 10 #define RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN 0 From 444bfc35577291a6fd2a5641b73586d959708b85 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Mon, 29 Sep 2025 10:31:35 +0800 Subject: [PATCH 4/7] Macro names --- src/hotspot/cpu/riscv/vm_version_riscv.cpp | 6 +++--- src/hotspot/cpu/riscv/vm_version_riscv.hpp | 18 +++++++++--------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp index 827eb4dab8985..ba9c100fe1e06 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp @@ -160,7 +160,7 @@ void VM_Version::common_initialize() { if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) { FLAG_SET_DEFAULT(AvoidUnalignedAccesses, - unaligned_scalar.value() != MISALIGNED_FAST); + unaligned_scalar.value() != MISALIGNED_SCALAR_FAST); } if (!AvoidUnalignedAccesses) { @@ -175,12 +175,12 @@ void VM_Version::common_initialize() { // This machine has fast unaligned memory accesses if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { FLAG_SET_DEFAULT(UseUnalignedAccesses, - (unaligned_scalar.value() == MISALIGNED_FAST)); + (unaligned_scalar.value() == MISALIGNED_SCALAR_FAST)); } if (FLAG_IS_DEFAULT(AlignVector) && unaligned_vector.enabled()) { FLAG_SET_DEFAULT(AlignVector, - unaligned_vector.value() != RISCV_HWPROBE_MISALIGNED_VECTOR_FAST); + unaligned_vector.value() != MISALIGNED_VECTOR_FAST); } #ifdef __riscv_ztso diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.hpp b/src/hotspot/cpu/riscv/vm_version_riscv.hpp index a453c93e3365c..f5950f386032c 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.hpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.hpp @@ -399,18 +399,18 @@ class VM_Version : public Abstract_VM_Version { // Values from riscv_hwprobe() enum UNALIGNED_SCALAR_ACCESS : int { - MISALIGNED_UNKNOWN = 0, - MISALIGNED_EMULATED = 1, - MISALIGNED_SLOW = 2, - MISALIGNED_FAST = 3, - MISALIGNED_UNSUPPORTED = 4 + MISALIGNED_SCALAR_UNKNOWN = 0, + MISALIGNED_SCALAR_EMULATED = 1, + MISALIGNED_SCALAR_SLOW = 2, + MISALIGNED_SCALAR_FAST = 3, + MISALIGNED_SCALAR_UNSUPPORTED = 4 }; enum UNALIGNED_VECTOR_ACCESS : int { - RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN = 0, - RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW = 2, - RISCV_HWPROBE_MISALIGNED_VECTOR_FAST = 3, - RISCV_HWPROBE_MISALIGNED_VECTOR__UNSUPPORTED = 4 + MISALIGNED_VECTOR_UNKNOWN = 0, + MISALIGNED_VECTOR_SLOW = 2, + MISALIGNED_VECTOR_FAST = 3, + MISALIGNED_VECTOR_UNSUPPORTED = 4 }; // Null terminated list From a80ee0755533acc3289b7de132f51cdf613444fe Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Mon, 29 Sep 2025 10:53:27 +0800 Subject: [PATCH 5/7] Fix --- src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp b/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp index b2c46f4a4e8d0..89501aac9797a 100644 --- a/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp +++ b/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp @@ -303,7 +303,7 @@ void VM_Version::rivos_features() { ext_Zvfh.enable_feature(); - unaligned_scalar.enable_feature(MISALIGNED_FAST); + unaligned_scalar.enable_feature(MISALIGNED_SCALAR_FAST); satp_mode.enable_feature(VM_SV48); // Features dependent on march/mimpid. From 90f6eb799c3f5e46236c4c22e3c0f2df2eaab269 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Mon, 29 Sep 2025 18:08:21 +0800 Subject: [PATCH 6/7] Review --- src/hotspot/cpu/riscv/vm_version_riscv.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp index ba9c100fe1e06..927af6f8d9510 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp @@ -178,7 +178,7 @@ void VM_Version::common_initialize() { (unaligned_scalar.value() == MISALIGNED_SCALAR_FAST)); } - if (FLAG_IS_DEFAULT(AlignVector) && unaligned_vector.enabled()) { + if (FLAG_IS_DEFAULT(AlignVector)) { FLAG_SET_DEFAULT(AlignVector, unaligned_vector.value() != MISALIGNED_VECTOR_FAST); } From aabf1ea9ee0d9cba3b3abb997f3ada1a99de3dd6 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Mon, 29 Sep 2025 22:07:22 +0800 Subject: [PATCH 7/7] Review --- src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp index 42264f274e22a..a95bfb4ff96d3 100644 --- a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp +++ b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp @@ -267,12 +267,17 @@ void RiscvHwprobe::add_features_from_query_result() { VM_Version::ext_Zicond.enable_feature(); } #endif - // RISCV_HWPROBE_KEY_CPUPERF_0 is deprecated. Keep it there for backward + // RISCV_HWPROBE_KEY_CPUPERF_0 is deprecated and returns similar values + // to RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF. Keep it there for backward // compatibility with old kernels. if (is_valid(RISCV_HWPROBE_KEY_CPUPERF_0)) { VM_Version::unaligned_scalar.enable_feature( query[RISCV_HWPROBE_KEY_CPUPERF_0].value & RISCV_HWPROBE_MISALIGNED_MASK); + } else if (is_valid(RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF)) { + VM_Version::unaligned_scalar.enable_feature( + query[RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF].value); } + if (is_valid(RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF)) { VM_Version::unaligned_vector.enable_feature( query[RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF].value);