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8264543: Cross modify fence optimization for x86 #3334
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👋 Welcome back xbzhang99! A progress list of the required criteria for merging this PR into |
@xbzhang99 The following label will be automatically applied to this pull request:
When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command. |
Webrevs
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If this is an optimization, do you have any numbers that show an improvement with this change? |
Hi Gerard, |
@gerard-ziemski Hi, could you review the patch? thanks. |
Could I please get someone to review this PR? |
Sorry xbzhang99, I do not know enough x86 assembly to actually review it. |
Just a drive-by comment, not a review. This change is (necessarily) kind of messy because of the needed low-level If the performance impact of this change makes it worth doing, then it |
I don't see any rush to make this change so there is time to gather the missing benchmark data. If Intel recommend making this change then we should definitely consider it, but we need to know that it won't adversely affect anyone first. And as Kim said this should be done for all x86 in that case.
Sorry what do you mean by this? Thanks, |
@dholmes-ora VM exit is transitioning from a running VM to the hypervisor. The processor has to save the state of the VM. It is a costly operation. The cpuid instruction requires VM exit (https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3c-part-3-manual.pdf 25.1.2) |
@xbzhang99 This pull request has been inactive for more than 4 weeks and will be automatically closed if another 4 weeks passes without any activity. To avoid this, simply add a new comment to the pull request. Feel free to ask for assistance if you need help with progressing this pull request towards integration! |
…fails in Windows debug build Reviewed-by: serb, psadhukhan, pbansal
Reviewed-by: valeriep
…est.java failed with OutOfMemoryError Reviewed-by: stuefe, iignatyev
…mtiExport::post_compiled_method_load Reviewed-by: sspitsyn, dholmes, coleenp
Reviewed-by: kvn, sviswanathan
Reviewed-by: zgu, xliu
Reviewed-by: tschatzl, kbarrett
…s wrong mechanism to cause evacuation failure Reviewed-by: kbarrett, iwalulya, ayang
…in the loop during execution Reviewed-by: vromero
Co-authored-by: Wang Huang <whuang@openjdk.org> Co-authored-by: Ai Jiaming <aijiaming1@huawei.com> Reviewed-by: njian, jbhateja, sviswanathan, dlong, adinn
…s take 1ms minimum Reviewed-by: kbarrett, ayang, lkorinth
Reviewed-by: vromero
…ting handle outside HandleMark Reviewed-by: coleenp, jvernee
Reviewed-by: kvn, adinn
…rtcuts for additional launchers Reviewed-by: asemenyuk, almatvee
Reviewed-by: kvn, thartmann
Reviewed-by: aph
…eate failed (EAGAIN) Reviewed-by: stuefe, iklam
Reviewed-by: jdv
…mmand Reviewed-by: kvn, xliu
…ackage/HeapMonitor* tests Reviewed-by: tschatzl, jiefu
…orts") Reviewed-by: darcy, bpb
…_start* to asserts Reviewed-by: ayang, tschatzl
Reviewed-by: jiefu
…certification/LetsEncryptCA Reviewed-by: mbaesken
…parameter to size_t type Reviewed-by: iklam, minqi
…st.java on Linux Reviewed-by: mikael, pbansal
Reviewed-by: dholmes, xliu, stuefe, minqi
Reviewed-by: sspitsyn
Reviewed-by: rrich, chagedorn
Reviewed-by: ayang, kbarrett
… does not support it Reviewed-by: tschatzl, lkorinth
…modify fence, on supported platforms rebase with master
…nto JDK-8264543
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reopened new one as #4848 |
Intel introduced a new instruction “serialize” which ensures that all modifications to flags, registers, and memory by previous instructions are completed and all buffered writes are drained to memory before the next instruction is fetched and executed. It is a serializing instruction and can be used to implement cross modify fence (OrderAccess::cross_modify_fence_impl) more efficiently than using “cpuid” on supported 32-bit and 64-bit x86 platforms.
The availability of the SERIALIZE instruction is indicated by the presence of the CPUID feature flag SERIALIZE, bit 14 of the EDX register in sub-leaf CPUID:7H.0H.
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
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Using
git
Checkout this PR locally:
$ git fetch https://git.openjdk.java.net/jdk pull/3334/head:pull/3334
$ git checkout pull/3334
Update a local copy of the PR:
$ git checkout pull/3334
$ git pull https://git.openjdk.java.net/jdk pull/3334/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 3334
View PR using the GUI difftool:
$ git pr show -t 3334
Using diff file
Download this PR as a diff file:
https://git.openjdk.java.net/jdk/pull/3334.diff