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8264543: Cross modify fence optimization for x86 #3334

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@xbzhang99 xbzhang99 commented Apr 2, 2021

Intel introduced a new instruction “serialize” which ensures that all modifications to flags, registers, and memory by previous instructions are completed and all buffered writes are drained to memory before the next instruction is fetched and executed. It is a serializing instruction and can be used to implement cross modify fence (OrderAccess::cross_modify_fence_impl) more efficiently than using “cpuid” on supported 32-bit and 64-bit x86 platforms.

The availability of the SERIALIZE instruction is indicated by the presence of the CPUID feature flag SERIALIZE, bit 14 of the EDX register in sub-leaf CPUID:7H.0H.

https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html


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…modify fence, on supported platforms
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@mlbridge mlbridge bot commented Apr 2, 2021

Webrevs

@xbzhang99 xbzhang99 changed the title 8264543: Using Intel serialize instruction to replace cpuid in Cross modify fence, on supported platforms 8264543: Cross modify fence optimization for x86 Apr 5, 2021
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@gerard-ziemski gerard-ziemski commented Apr 8, 2021

If this is an optimization, do you have any numbers that show an improvement with this change?

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@xbzhang99 xbzhang99 commented May 4, 2021

Hi Gerard,
Although we don't have benchmark data yet, serialize is the recommended alternative vs. using CPUID. Also, in the virtual machine environment, serialize provides full/fast serialization without causing VMEXIT

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