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8247645: ChaCha20 intrinsics #7702

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@jnimeh jnimeh commented Mar 4, 2022

This PR delivers ChaCha20 intrinsics that accelerate the core block function that generates key stream from the key, counter and nonce. Intrinsics have been written for the following platforms and instruction sets:

  • x86_64: AVX, AVX2 and AVX512
  • aarch64: platforms that support the advanced SIMD instructions

Note: Microbenchmark results moved to a comment in the PR so we don't have to see it in every email.

Special thanks to the folks who have made many helpful comments while this PR was in draft form.


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@jnimeh The following labels will be automatically applied to this pull request:

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@jnimeh jnimeh changed the title Prototype SSE2+AVX, AVX2, AVX512 intrinsics for x86_64 Prototype ChaCha20 intrinsics for x86_64 (SSE2+AVX, AVX2, AVX512) Mar 4, 2022
(vector_len == AVX_256bit ? VM_Version::supports_avx2() :
(vector_len == AVX_512bit ? VM_Version::supports_evex() : 0)), "");
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
InstructionAttr attributes(vector_len, /* rex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
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legacy_mode here should be _legacy_mode_bw.

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Good catch, fixed, along with all the other similar findings below.

src/hotspot/cpu/x86/assembler_x86.cpp Outdated Show resolved Hide resolved
src/hotspot/cpu/x86/assembler_x86.cpp Outdated Show resolved Hide resolved
src/hotspot/cpu/x86/assembler_x86.cpp Outdated Show resolved Hide resolved
src/hotspot/cpu/x86/stubGenerator_x86_64.cpp Outdated Show resolved Hide resolved
src/hotspot/cpu/x86/stubGenerator_x86_64.cpp Outdated Show resolved Hide resolved
const XMMRegister zmm_bVec = xmm1;
const XMMRegister zmm_cVec = xmm2;
const XMMRegister zmm_dVec = xmm3;
const XMMRegister zmm_scratch = xmm4;
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We could have 5 additional scratch registers zmm_s1 .. zmm_s5 (mapping to xmm5 ... xmm9) to keep values read from memory into registers.

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For AVX-512 I was able to get it to work with 4 scratch registers fortunately. For AVX and AVX2 I think the same approach can work, but since there are no lanewise bit rotation instructions (just L/R shifts) that I can find I need a 5th scratch register.

For the 32-bit version it is a little more complicated as there are only 8 SIMD registers to work with. I think even there I could simply read the state from memory for one memory-to-register add instead of doing 4, and then hold the other 128-bit state lines on 3 scratch registers. I'm going to experiment with that a bit to see how much I can limit memory fetches to get some improvements on both 64-bit and 32-bit.

src/hotspot/cpu/x86/stubGenerator_x86_64.cpp Outdated Show resolved Hide resolved
src/hotspot/cpu/x86/stubGenerator_x86_64.cpp Outdated Show resolved Hide resolved
src/hotspot/cpu/x86/stubGenerator_x86_64.cpp Outdated Show resolved Hide resolved
Comment on lines 5834 to 5842
__ evmovdqul(zmm_scratch, ExternalAddress(StubRoutines::x86::chacha20_scattermask_avx512()), Assembler::AVX_512bit, rax);
__ kxnorwl(writeMask, writeMask, writeMask);
__ evpscatterdd(Address(result, zmm_scratch, Address::times_4), writeMask, zmm_aVec, Assembler::AVX_512bit);
__ knotwl(writeMask, writeMask);
__ evpscatterdd(Address(result, zmm_scratch, Address::times_4, 16), writeMask, zmm_bVec, Assembler::AVX_512bit);
__ knotwl(writeMask, writeMask);
__ evpscatterdd(Address(result, zmm_scratch, Address::times_4, 32), writeMask, zmm_cVec, Assembler::AVX_512bit);
__ knotwl(writeMask, writeMask);
__ evpscatterdd(Address(result, zmm_scratch, Address::times_4, 48), writeMask, zmm_dVec, Assembler::AVX_512bit);
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Using the vextracti32x4 instead of evpscatterdd would give better performance:
__ vextracti32x4(Address(result, 0), zmm_aVec, 0);
__ vextracti32x4(Address(result, 64), zmm_aVec, 1);
__ vextracti32x4(Address(result, 128), zmm_aVec, 2);
__ vextracti32x4(Address(result, 192), zmm_aVec, 3);
__ vextracti32x4(Address(result, 16), zmm_bVec, 0);
__ vextracti32x4(Address(result, 80), zmm_bVec, 1);
__ vextracti32x4(Address(result, 144), zmm_bVec, 2);
__ vextracti32x4(Address(result, 208), zmm_bVec, 3);
__ vextracti32x4(Address(result, 32), zmm_cVec, 0);
__ vextracti32x4(Address(result, 96), zmm_cVec, 1);
__ vextracti32x4(Address(result, 160), zmm_cVec, 2);
__ vextracti32x4(Address(result, 224), zmm_cVec, 3);
__ vextracti32x4(Address(result, 48), zmm_dVec, 0);
__ vextracti32x4(Address(result, 112), zmm_dVec, 1);
__ vextracti32x4(Address(result, 176), zmm_dVec, 2);
__ vextracti32x4(Address(result, 240), zmm_dVec, 3);

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I have been wondering about this approach for a while now, since I did something similar for the AVX2 version. I had assumed that using evpscatterdd used less instructions and therefore would be more efficient, but I'm more than happy to move to the vextracti32x4 approach. I'll be eager to see how it impacts performance along with the increased storage of intermediate data on additional XMMRegister objects.

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The changes you recommended yielded about a 10-15% performance improvement on the system I was using for benchmarks. Thanks for the suggestions!

@jnimeh jnimeh changed the title Prototype ChaCha20 intrinsics for x86_64 (SSE2+AVX, AVX2, AVX512) Prototype ChaCha20 intrinsics for x86 and aarch64 Apr 12, 2022
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⚠️ @jnimeh This pull request contains merges that bring in commits not present in the target repository. Since this is not a "merge style" pull request, these changes will be squashed when this pull request in integrated. If this is your intention, then please ignore this message. If you want to preserve the commit structure, you must change the title of this pull request to Merge <project>:<branch> where <project> is the name of another project in the OpenJDK organization (for example Merge jdk:master).

__ ext(b, __ T16B, b, b, bCnt); \
__ ext(c, __ T16B, c, c, cCnt); \
__ ext(d, __ T16B, d, d, dCnt); \

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There's a fairly extensive use of macros here for the rounds, but I don't think there's any need for them to be macros. SHIFT_LANES and all the other macros here should be functions. This would reduce the size of the libjvm.so binary.

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Thanks for the feedback. I've been wondering if I might need something like a macroAssembler__chapoly.cpp file to handle these kinds of things and future functions for Poly1305 when I start in on that. I wasn't aware of the impact on libjvm.so going the macro approach versus functions. I'll pull these out to functions.

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sviswa7 commented Nov 14, 2022

The x86_64 code looks good to me.

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@jnimeh This change now passes all automated pre-integration checks.

ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details.

After integration, the commit message for the final commit will be:

8247645: ChaCha20 intrinsics

Reviewed-by: sviswanathan, ngasson, vlivanov, ascarpino

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At the time when this comment was updated there had been 82 new commits pushed to the master branch:

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  • c05dc80: 8297660: x86: Redundant test+jump in C1 allocateArray
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jnimeh commented Nov 16, 2022

Hi @theRealAph, since I have the green light on the x86 side I was wondering if I could get your blessing on the aarch64 side of the house or if you have any other concerns.

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sviswa7 commented Nov 17, 2022

May be @nick-arm could review and approve for aarch64.

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jnimeh commented Nov 17, 2022

Another pair of arm-knowledgeable eyes on this is always welcome!

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AArch64 code looks OK to me, and I believe @jnimeh already discussed the implementation with one of my colleagues who works on crypto optimisation at Arm.

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Looks good.

if (UseChaCha20Intrinsics) {
if (VM_Version::supports_evex()) {
StubRoutines::_chacha20Block = generate_chacha20Block_avx512();
} else { // Either AVX or AVX2 is supported

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Worth to supplement the comment with an assert (either UseAVX > 0 or VM_Version::supports_avx() == true).

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Good catch. This has been implemented.

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openjdk bot commented Nov 22, 2022

@jnimeh this pull request can not be integrated into master due to one or more merge conflicts. To resolve these merge conflicts and update this pull request you can run the following commands in the local repository for your personal fork:

git checkout JDK-8247645
git fetch https://git.openjdk.org/jdk master
git merge FETCH_HEAD
# resolve conflicts and follow the instructions given by git merge
git commit -m "Merge master"
git push

@openjdk openjdk bot added merge-conflict Pull request has merge conflict with target branch and removed ready Pull request is ready to be integrated labels Nov 22, 2022
@openjdk openjdk bot added ready Pull request is ready to be integrated and removed merge-conflict Pull request has merge conflict with target branch labels Nov 22, 2022
// The base state, created at initialization time, and a working
// state which is a clone of the start state, and is then modified
// with the counter and the ChaCha20 block function.
// The 16-int state array and output keystream array:
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I think it would help readability if these comments were separated for each declaration

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Agreed. I've split those up for each declaration as suggested.

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jnimeh commented Nov 29, 2022

/integrate

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openjdk bot commented Nov 29, 2022

Going to push as commit cd6bebb.
Since your change was applied there have been 95 commits pushed to the master branch:

  • 33587ff: 8292625: jshell crash on "var a = a"
  • 2deb318: 8297065: DerOutputStream operations should not throw IOExceptions
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  • ... and 85 more: https://git.openjdk.org/jdk/compare/392ac7055d4697c56fa85ac5572f5bc4dc431f1d...master

Your commit was automatically rebased without conflicts.

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@jnimeh Pushed as commit cd6bebb.

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