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8285436: riscv: Fix broken MacroAssembler::debug64 #8357
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@zhengxiaolinX The following label will be automatically applied to this pull request:
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/label hotspot-compiler |
@zhengxiaolinX |
@zhengxiaolinX |
@zhengxiaolinX The |
@@ -530,7 +530,7 @@ void MacroAssembler::resolve_jobject(Register value, Register thread, Register t | |||
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void MacroAssembler::stop(const char* msg) { | |||
address ip = pc(); | |||
pusha(); | |||
push_reg(0xffffffff, sp); |
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Good catch, Xiaolin. But I plan to follow JDK-8245986 to use a specific instruction which will raise a SIGILL according to riscv spec. The patch will remove all these push/pop(s).
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Thank you for the explanation, Yadong. That would be better if you have future plans for this part, and I feel fine to retract this one as well because it might be not so important.
@zhengxiaolinX Should we close the JBS issue then? |
Thank you! Closed. |
MacroAssembler::stop()
[1] andStubGenerator::generate_verify_oop()
[2] would first push all regs (callingMacroAssembler::pusha()
[3]) onto the stack and then callMacroAssembler::debug64()
[4] to print the pushed regs. ButMacroAssembler::pusha()
[3] won't push x0~x4 so the result ofMacroAssembler::debug64()
is broken.Tested by manually adding a
__ verify_oop(x1)
and option-XX:+VerifyOops -XX:+ShowMessageBoxOnError
to deliberately crash the VM to make sure the new result matches the fact. Also a hotspot tier1.[1] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp#L533
[2] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp#L581
[3] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp#L1126-L1130
[4] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp#L473-L503
Thanks,
Xiaolin
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https://git.openjdk.java.net/jdk/pull/8357.diff