8255438: [Vector API] More instructs in x86.ad should use legacy mode for code-gen #874
Just as @jatin-bhateja pointed out , there are more instructs in x86.ad which should use legacy mode.
It would be better to fix the following cases:
Bugs in mul2L_reg/vmul4L_reg_avx/reductionL can be only reproduced on AVX512 machines without avx512dq.
Unfortunately, it's impossible for us to create reproducers since our AVX512 platforms support both avx512dq and avx512bw.
The fix just changes vec to legVec, which is quite safe in theory.
As for the reduction patterns of Float and Double, I don't see any reason that they should use legacy mode (maybe I've missed something).
Thanks a lot.
 #791 (comment)
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From correctness perspective, the fix looks good.
The only concern I have is that the fix completely disables the usage of the upper bank (16-31) registers for those operands irrespective of whether BW/DQ are present or not. It may lead to performance problems when vector register pressure is high.
Thanks @iwanowww for your review.
reductionL_avx512dq and reductionB_avx512bw have been added for your concerns.
@DamonFool Since your change was applied there have been 41 commits pushed to the
Your commit was automatically rebased without conflicts.
Pushed as commit d82a6dc.