8288992: AArch64: CMN should be handled the same way as CMP #9246
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| inline void cmnw(Register Rd, unsigned imm) { addsw(zr, Rd, imm); } | ||
| inline void cmn(Register Rd, unsigned imm) { adds(zr, Rd, imm); } | ||
| template<class T> |
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Why do we need it to be a template?
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If we made it unsigned int, we'd risk a 64-bit signed value (from C2, for example) being truncated before being passed to addsw(Register Rd, Register Rn, uint64_t imm). As we now have a 64-bit-clean path through all this code, that would be a Bad Thing.
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Thank you for the explanation. I reread the code and found why I got confused.
MacroAssembler::cmnw call addsw which is defined by WRAP(addsw, true).
The macro expends to
void addsw(Register Rd, Register Rn, uint64_t imm) {
wrap_adds_subs_imm_insn(Rd, Rn, imm, &Assembler::addsw, &Assembler::addsw, true);
}
void addsw(Register Rd, Register Rn, Register Rm, enum shift_kind kind, unsigned shift = 0) {
Assembler::addsw(Rd, Rn, Rm, kind, shift);
}
void addsw(Register Rd, Register Rn, Register Rm) {
Assembler::addsw(Rd, Rn, Rm);
}
void addsw(Register Rd, Register Rn, Register Rm, ext::operation option, int amount = 0) {
Assembler::addsw(Rd, Rn, Rm, option, amount);
}
I've mixed it up with Assembler::addsw(Register Rd, Register Rn, unsigned imm):
#define INSN(NAME, decode, negated) \
void NAME(Register Rd, Register Rn, unsigned imm, unsigned shift) { \
starti; \
f(decode, 31, 29), f(0b10001, 28, 24), f(shift, 23, 22), f(imm, 21, 10); \
zrf(Rd, 0), srf(Rn, 5); \
} \
\
void NAME(Register Rd, Register Rn, unsigned imm) { \
starti; \
add_sub_immediate(current_insn, Rd, Rn, imm, decode, negated); \
}
INSN(addsw, 0b001, 0b011);
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At present,
cmp(r8, -1)fails at compile time, butcmn(r8, -1)fails at runtime. We should fix cmn() to be the same ascmp().After this change, it's much less likely that we'll be surprised by immediate overflows in
cmn().Progress
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