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8288865: [aarch64] LDR instructions must use legitimized addresses
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Reviewed-by: aph
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Alexey Pavlyutkin authored and Yuri Nesterenko committed Jul 20, 2022
1 parent c1e2cf6 commit 1f40289
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Showing 3 changed files with 573 additions and 16 deletions.
16 changes: 8 additions & 8 deletions src/hotspot/cpu/aarch64/aarch64.ad
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Original file line number Diff line number Diff line change
Expand Up @@ -2569,63 +2569,63 @@ encode %{
enc_class aarch64_enc_ldrshw(iRegI dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrshw, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 2);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldrsh(iRegI dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrsh, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 2);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldrh(iRegI dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrh, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 2);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldrh(iRegL dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrh, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 2);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldrw(iRegI dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrw, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 4);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldrw(iRegL dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrw, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 4);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldrsw(iRegL dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldrsw, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 4);
%}

// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_ldr(iRegL dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::ldr, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 8);
%}

// This encoding class is generated automatically from ad_encode.m4.
Expand Down
27 changes: 19 additions & 8 deletions src/hotspot/cpu/aarch64/ad_encode.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,17 @@ define(LOAD,`
dnl
dnl
dnl
define(LOADL,`
// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
enc_class aarch64_enc_$2($1 dst, memory mem) %{
$3Register dst_reg = as_$3Register($dst$$reg);
loadStore(MacroAssembler(&cbuf), &MacroAssembler::$2, dst_reg, $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, $4);
%}')dnl
dnl
dnl
dnl
define(LOADV,`
// This encoding class is generated automatically from ad_encode.m4.
// DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
Expand Down Expand Up @@ -106,14 +117,14 @@ LOAD(iRegI,ldrsbw)
LOAD(iRegI,ldrsb)
LOAD(iRegI,ldrb)
LOAD(iRegL,ldrb)
LOAD(iRegI,ldrshw)
LOAD(iRegI,ldrsh)
LOAD(iRegI,ldrh)
LOAD(iRegL,ldrh)
LOAD(iRegI,ldrw)
LOAD(iRegL,ldrw)
LOAD(iRegL,ldrsw)
LOAD(iRegL,ldr)
LOADL(iRegI,ldrshw,,2)
LOADL(iRegI,ldrsh,,2)
LOADL(iRegI,ldrh,,2)
LOADL(iRegL,ldrh,,2)
LOADL(iRegI,ldrw,,4)
LOADL(iRegL,ldrw,,4)
LOADL(iRegL,ldrsw,,4)
LOADL(iRegL,ldr,,8)
LOAD(vRegF,ldrs,Float)
LOAD(vRegD,ldrd,Float)
LOADV(vecD,ldrvS,S)
Expand Down
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