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1 | 1 | //
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2 |
| -// Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved. |
| 2 | +// Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. |
3 | 3 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 | 4 | //
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5 | 5 | // This code is free software; you can redistribute it and/or modify it
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@@ -7900,9 +7900,9 @@ instruct divI_eReg(eAXRegI rax, eDXRegI rdx, eCXRegI div, eFlagsReg cr) %{
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7900 | 7900 | %}
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7901 | 7901 |
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7902 | 7902 | // Divide Register Long
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7903 |
| -instruct divL_eReg( eADXRegL dst, eRegL src1, eRegL src2, eFlagsReg cr, eCXRegI cx, eBXRegI bx ) %{ |
| 7903 | +instruct divL_eReg(eADXRegL dst, eRegL src1, eRegL src2) %{ |
7904 | 7904 | match(Set dst (DivL src1 src2));
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7905 |
| - effect( KILL cr, KILL cx, KILL bx ); |
| 7905 | + effect(CALL); |
7906 | 7906 | ins_cost(10000);
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7907 | 7907 | format %{ "PUSH $src1.hi\n\t"
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7908 | 7908 | "PUSH $src1.lo\n\t"
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@@ -7948,9 +7948,9 @@ instruct modI_eReg(eDXRegI rdx, eAXRegI rax, eCXRegI div, eFlagsReg cr) %{
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7948 | 7948 | %}
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7949 | 7949 |
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7950 | 7950 | // Remainder Register Long
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7951 |
| -instruct modL_eReg( eADXRegL dst, eRegL src1, eRegL src2, eFlagsReg cr, eCXRegI cx, eBXRegI bx ) %{ |
| 7951 | +instruct modL_eReg(eADXRegL dst, eRegL src1, eRegL src2) %{ |
7952 | 7952 | match(Set dst (ModL src1 src2));
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7953 |
| - effect( KILL cr, KILL cx, KILL bx ); |
| 7953 | + effect(CALL); |
7954 | 7954 | ins_cost(10000);
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7955 | 7955 | format %{ "PUSH $src1.hi\n\t"
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7956 | 7956 | "PUSH $src1.lo\n\t"
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