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8251930: AArch64: Native types mismatch in hotspot
Reviewed-by: phh
Backport-of: f1e0780
  • Loading branch information
Vladimir Kempik committed Sep 9, 2021
1 parent cf95c4c commit 8da3a003be49f2ed3cf000ee47c82dcd6395faed
@@ -3005,7 +3005,7 @@ encode %{
if (con < (address)(uintptr_t)os::vm_page_size()) {
__ mov(dst_reg, con);
} else {
uintptr_t offset;
uint64_t offset;
__ adrp(dst_reg, con, offset);
__ add(dst_reg, dst_reg, offset);
}
@@ -1532,7 +1532,7 @@ void Address::lea(MacroAssembler *as, Register r) const {
}
}

void Assembler::adrp(Register reg1, const Address &dest, uintptr_t &byte_offset) {
void Assembler::adrp(Register reg1, const Address &dest, uint64_t &byte_offset) {
ShouldNotReachHere();
}

@@ -1702,7 +1702,7 @@ void Assembler::add_sub_immediate(Register Rd, Register Rn, unsigned uimm, int o
}

bool Assembler::operand_valid_for_add_sub_immediate(int64_t imm) {
uint64_t uimm = (uint64_t)uabs(imm);
uint64_t uimm = (uint64_t)uabs((jlong)imm);
if (uimm < (1 << 12))
return true;
if (uimm < (1 << 24)
@@ -380,9 +380,15 @@ class Address {
: _base(r), _index(noreg), _offset(0), _mode(base_plus_offset), _target(0) { }
Address(Register r, int o)
: _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
Address(Register r, int64_t o)
Address(Register r, long o)
: _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
Address(Register r, uint64_t o)
Address(Register r, long long o)
: _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
Address(Register r, unsigned int o)
: _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
Address(Register r, unsigned long o)
: _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
Address(Register r, unsigned long long o)
: _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
#ifdef ASSERT
Address(Register r, ByteSize disp)
@@ -405,7 +405,7 @@ void MacroAssembler::far_call(Address entry, CodeBuffer *cbuf, Register tmp) {
assert(CodeCache::find_blob(entry.target()) != NULL,
"destination of far call not found in code cache");
if (far_branches()) {
uintptr_t offset;
uint64_t offset;
// We can use ADRP here because we know that the total size of
// the code cache cannot exceed 2Gb.
adrp(tmp, entry, offset);
@@ -423,7 +423,7 @@ void MacroAssembler::far_jump(Address entry, CodeBuffer *cbuf, Register tmp) {
assert(CodeCache::find_blob(entry.target()) != NULL,
"destination of far call not found in code cache");
if (far_branches()) {
uintptr_t offset;
uint64_t offset;
// We can use ADRP here because we know that the total size of
// the code cache cannot exceed 2Gb.
adrp(tmp, entry, offset);
@@ -1492,7 +1492,7 @@ void MacroAssembler::movptr(Register r, uintptr_t imm64) {
#ifndef PRODUCT
{
char buffer[64];
snprintf(buffer, sizeof(buffer), "0x%"PRIX64, imm64);
snprintf(buffer, sizeof(buffer), "0x%"PRIX64, (uint64_t)imm64);
block_comment(buffer);
}
#endif
@@ -2496,43 +2496,43 @@ void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[])
#endif
if (os::message_box(msg, "Execution stopped, print registers?")) {
ttyLocker ttyl;
tty->print_cr(" pc = 0x%016lx", pc);
tty->print_cr(" pc = 0x%016" PRIx64, pc);
#ifndef PRODUCT
tty->cr();
findpc(pc);
tty->cr();
#endif
tty->print_cr(" r0 = 0x%016lx", regs[0]);
tty->print_cr(" r1 = 0x%016lx", regs[1]);
tty->print_cr(" r2 = 0x%016lx", regs[2]);
tty->print_cr(" r3 = 0x%016lx", regs[3]);
tty->print_cr(" r4 = 0x%016lx", regs[4]);
tty->print_cr(" r5 = 0x%016lx", regs[5]);
tty->print_cr(" r6 = 0x%016lx", regs[6]);
tty->print_cr(" r7 = 0x%016lx", regs[7]);
tty->print_cr(" r8 = 0x%016lx", regs[8]);
tty->print_cr(" r9 = 0x%016lx", regs[9]);
tty->print_cr("r10 = 0x%016lx", regs[10]);
tty->print_cr("r11 = 0x%016lx", regs[11]);
tty->print_cr("r12 = 0x%016lx", regs[12]);
tty->print_cr("r13 = 0x%016lx", regs[13]);
tty->print_cr("r14 = 0x%016lx", regs[14]);
tty->print_cr("r15 = 0x%016lx", regs[15]);
tty->print_cr("r16 = 0x%016lx", regs[16]);
tty->print_cr("r17 = 0x%016lx", regs[17]);
tty->print_cr("r18 = 0x%016lx", regs[18]);
tty->print_cr("r19 = 0x%016lx", regs[19]);
tty->print_cr("r20 = 0x%016lx", regs[20]);
tty->print_cr("r21 = 0x%016lx", regs[21]);
tty->print_cr("r22 = 0x%016lx", regs[22]);
tty->print_cr("r23 = 0x%016lx", regs[23]);
tty->print_cr("r24 = 0x%016lx", regs[24]);
tty->print_cr("r25 = 0x%016lx", regs[25]);
tty->print_cr("r26 = 0x%016lx", regs[26]);
tty->print_cr("r27 = 0x%016lx", regs[27]);
tty->print_cr("r28 = 0x%016lx", regs[28]);
tty->print_cr("r30 = 0x%016lx", regs[30]);
tty->print_cr("r31 = 0x%016lx", regs[31]);
tty->print_cr(" r0 = 0x%016" PRIx64, regs[0]);
tty->print_cr(" r1 = 0x%016" PRIx64, regs[1]);
tty->print_cr(" r2 = 0x%016" PRIx64, regs[2]);
tty->print_cr(" r3 = 0x%016" PRIx64, regs[3]);
tty->print_cr(" r4 = 0x%016" PRIx64, regs[4]);
tty->print_cr(" r5 = 0x%016" PRIx64, regs[5]);
tty->print_cr(" r6 = 0x%016" PRIx64, regs[6]);
tty->print_cr(" r7 = 0x%016" PRIx64, regs[7]);
tty->print_cr(" r8 = 0x%016" PRIx64, regs[8]);
tty->print_cr(" r9 = 0x%016" PRIx64, regs[9]);
tty->print_cr("r10 = 0x%016" PRIx64, regs[10]);
tty->print_cr("r11 = 0x%016" PRIx64, regs[11]);
tty->print_cr("r12 = 0x%016" PRIx64, regs[12]);
tty->print_cr("r13 = 0x%016" PRIx64, regs[13]);
tty->print_cr("r14 = 0x%016" PRIx64, regs[14]);
tty->print_cr("r15 = 0x%016" PRIx64, regs[15]);
tty->print_cr("r16 = 0x%016" PRIx64, regs[16]);
tty->print_cr("r17 = 0x%016" PRIx64, regs[17]);
tty->print_cr("r18 = 0x%016" PRIx64, regs[18]);
tty->print_cr("r19 = 0x%016" PRIx64, regs[19]);
tty->print_cr("r20 = 0x%016" PRIx64, regs[20]);
tty->print_cr("r21 = 0x%016" PRIx64, regs[21]);
tty->print_cr("r22 = 0x%016" PRIx64, regs[22]);
tty->print_cr("r23 = 0x%016" PRIx64, regs[23]);
tty->print_cr("r24 = 0x%016" PRIx64, regs[24]);
tty->print_cr("r25 = 0x%016" PRIx64, regs[25]);
tty->print_cr("r26 = 0x%016" PRIx64, regs[26]);
tty->print_cr("r27 = 0x%016" PRIx64, regs[27]);
tty->print_cr("r28 = 0x%016" PRIx64, regs[28]);
tty->print_cr("r30 = 0x%016" PRIx64, regs[30]);
tty->print_cr("r31 = 0x%016" PRIx64, regs[31]);
BREAKPOINT;
}
ThreadStateTransition::transition(thread, _thread_in_vm, saved_state);
@@ -470,31 +470,20 @@ class MacroAssembler: public Assembler {
// now mov instructions for loading absolute addresses and 32 or
// 64 bit integers

inline void mov(Register dst, address addr)
{
mov_immediate64(dst, (uint64_t)addr);
}
inline void mov(Register dst, address addr) { mov_immediate64(dst, (uint64_t)addr); }

inline void mov(Register dst, uint64_t imm64)
{
mov_immediate64(dst, imm64);
}
inline void mov(Register dst, int imm64) { mov_immediate64(dst, (uint64_t)imm64); }
inline void mov(Register dst, long imm64) { mov_immediate64(dst, (uint64_t)imm64); }
inline void mov(Register dst, long long imm64) { mov_immediate64(dst, (uint64_t)imm64); }
inline void mov(Register dst, unsigned int imm64) { mov_immediate64(dst, (uint64_t)imm64); }
inline void mov(Register dst, unsigned long imm64) { mov_immediate64(dst, (uint64_t)imm64); }
inline void mov(Register dst, unsigned long long imm64) { mov_immediate64(dst, (uint64_t)imm64); }

inline void movw(Register dst, uint32_t imm32)
{
mov_immediate32(dst, imm32);
}

inline void mov(Register dst, int64_t l)
{
mov(dst, (uint64_t)l);
}

inline void mov(Register dst, int i)
{
mov(dst, (int64_t)i);
}

void mov(Register dst, RegisterOrConstant src) {
if (src.is_register())
mov(dst, src.as_register());

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