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1 | 1 | //
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2 |
| -// Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. |
| 2 | +// Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. |
3 | 3 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 | 4 | //
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5 | 5 | // This code is free software; you can redistribute it and/or modify it
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@@ -7810,9 +7810,9 @@ instruct divI_eReg(eAXRegI rax, eDXRegI rdx, eCXRegI div, eFlagsReg cr) %{
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7810 | 7810 | %}
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7811 | 7811 |
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7812 | 7812 | // Divide Register Long
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7813 |
| -instruct divL_eReg( eADXRegL dst, eRegL src1, eRegL src2, eFlagsReg cr, eCXRegI cx, eBXRegI bx ) %{ |
| 7813 | +instruct divL_eReg(eADXRegL dst, eRegL src1, eRegL src2) %{ |
7814 | 7814 | match(Set dst (DivL src1 src2));
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7815 |
| - effect( KILL cr, KILL cx, KILL bx ); |
| 7815 | + effect(CALL); |
7816 | 7816 | ins_cost(10000);
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7817 | 7817 | format %{ "PUSH $src1.hi\n\t"
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7818 | 7818 | "PUSH $src1.lo\n\t"
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@@ -7858,9 +7858,9 @@ instruct modI_eReg(eDXRegI rdx, eAXRegI rax, eCXRegI div, eFlagsReg cr) %{
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7858 | 7858 | %}
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7859 | 7859 |
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7860 | 7860 | // Remainder Register Long
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7861 |
| -instruct modL_eReg( eADXRegL dst, eRegL src1, eRegL src2, eFlagsReg cr, eCXRegI cx, eBXRegI bx ) %{ |
| 7861 | +instruct modL_eReg(eADXRegL dst, eRegL src1, eRegL src2) %{ |
7862 | 7862 | match(Set dst (ModL src1 src2));
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7863 |
| - effect( KILL cr, KILL cx, KILL bx ); |
| 7863 | + effect(CALL); |
7864 | 7864 | ins_cost(10000);
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7865 | 7865 | format %{ "PUSH $src1.hi\n\t"
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7866 | 7866 | "PUSH $src1.lo\n\t"
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