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8276799: Implementation of JEP 422: Linux/RISC-V Port #1427

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@RealFYang RealFYang commented Jun 13, 2023

The RISC-V port was originally developed at Huawei Technologies, then integrated into OpenJDK 19.

The 17u version of the port has continued to be maintained in the openjdk/riscv-port-jdk17u repo later
and has been tested for several months. There are few changes to shared HotSpot code (mostly the main
one is C1 conditional move/branch support for RISC-V). As required by 17u maintainer, changes to shared
code has been kept to a minimum. Only enabling shared changes are incorporated and these changes are
properly guarded with macro RISCV. So this 17u port should not breaking existing code and, although it is
a large patch, finally integrating it into 17u upstream should be low risk.

Testing on linux-riscv64 platform:

  • Bootcycle (release & fastdebug build)
  • Tier1-4 tests (release build)
  • Benchmark workloads (Dacapo, SPECJbb2015, SPECJVM2008, Renaissance. release build)

Progress

  • Change must be properly reviewed (1 review required, with at least 1 Reviewer)
  • Change must not contain extraneous whitespace
  • Commit message must refer to an issue

Issues

  • JDK-8276799: Implementation of JEP 422: Linux/RISC-V Port (Sub-task - P2)
  • JDK-8282306: os::is_first_C_frame(frame*) crashes on invalid link access (Enhancement - P4)
  • JDK-8282477: [x86, aarch64] vmassert(_last_Java_pc == NULL, "already walkable"); fails with async profiler (Bug - P4)
  • JDK-8283865: riscv: Break down -XX:+UseRVB into seperate options for each bitmanip extension (Enhancement - P4)
  • JDK-8284068: riscv: should call Atomic::release_store in JavaThread::set_thread_state (Bug - P4)
  • JDK-8284937: riscv: should not allocate special register for temp (Bug - P3)
  • JDK-8285303: riscv: Incorrect register mask in call_native_base (Bug - P5)
  • JDK-8287418: riscv: Fix correctness issue of MacroAssembler::movptr (Bug - P3)
  • JDK-8297644: RISC-V: Compilation error when shenandoah is disabled (Bug - P3)
  • JDK-8291952: riscv: Remove PRAGMA_NONNULL_IGNORED (Enhancement - P4)
  • JDK-8285437: riscv: Fix MachNode size mismatch for MacroAssembler::verify_oops* (Bug - P4)
  • JDK-8285699: riscv: Provide information when hitting a HaltNode (Enhancement - P4)
  • JDK-8285711: riscv: RVC: Support disassembler show-bytes option (Bug - P5)
  • JDK-8287425: Remove unnecessary register push for MacroAssembler::check_klass_subtype_slow_path (Enhancement - P4)
  • JDK-8287552: riscv: Fix comment typo in li64 (Bug - P5)
  • JDK-8287970: riscv: jdk/incubator/vector/*VectorTests failing (Bug - P3)
  • JDK-8290137: riscv: small refactoring for add_memory_int32/64 (Enhancement - P4)
  • JDK-8290164: compiler/runtime/TestConstantsInError.java fails on riscv (Bug - P4)
  • JDK-8290496: riscv: Fix build warnings-as-errors with GCC 11 (Bug - P4)
  • JDK-8291893: riscv: remove fence.i used in user space (Enhancement - P4)
  • JDK-8291947: riscv: fail to build after JDK-8290840 (Bug - P3)
  • JDK-8292867: RISC-V: Simplify weak CAS return value handling (Enhancement - P4)
  • JDK-8293050: RISC-V: Remove redundant non-null assertions about macro-assembler (Enhancement - P4)
  • JDK-8293100: RISC-V: Need to save and restore callee-saved FloatRegisters in StubGenerator::generate_call_stub (Bug - P3)
  • JDK-8293474: RISC-V: Unify the way of moving function pointer (Enhancement - P4)
  • JDK-8293524: RISC-V: Use macro-assembler functions as appropriate (Enhancement - P4)
  • JDK-8293566: RISC-V: Clean up push and pop registers (Enhancement - P4)
  • JDK-8294012: RISC-V: get/put_native_u8 missing the case when address&7 is 6 (Bug - P4)
  • JDK-8294083: RISC-V: Minimal build failed with --disable-precompiled-headers (Bug - P4)
  • JDK-8294086: RISC-V: Cleanup InstructionMark usages in the backend (Enhancement - P5)
  • JDK-8294087: RISC-V: RVC: Fix a potential alignment issue and add more alignment assertions for the patchable calls/nops (Bug - P2)
  • JDK-8294187: RISC-V: Unify all relocations for the backend into AbstractAssembler::relocate() (Enhancement - P4)
  • JDK-8294366: RISC-V: Partially mark out incompressible regions (Enhancement - P4)
  • JDK-8294430: RISC-V: Small refactoring for movptr_with_offset (Enhancement - P4)
  • JDK-8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites (Enhancement - P4)
  • JDK-8294679: RISC-V: Misc crash dump improvements (Enhancement - P3)
  • JDK-8295110: RISC-V: Mark out relocations as incompressible (Enhancement - P4)
  • JDK-8295270: RISC-V: Clean up and refactoring for assembler functions (Enhancement - P4)
  • JDK-8295396: RISC-V: Cleanup useless CompressibleRegions (Enhancement - P4)
  • JDK-8295926: RISC-V: C1: Fix LIRGenerator::do_LibmIntrinsic (Bug - P2)
  • JDK-8295968: RISC-V: Rename some assembler intrinsic functions for RVV 1.0 (Enhancement - P4)
  • JDK-8296435: RISC-V: Small refactoring for increment/decrement (Enhancement - P4)
  • JDK-8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec (Enhancement - P4)
  • JDK-8296448: RISC-V: Fix temp usages of heapbase register killed by MacroAssembler::en/decode_klass_not_null (Bug - P3)
  • JDK-8296602: RISC-V: improve performance of copy_memory stub (Enhancement - P4)
  • JDK-8296771: RISC-V: C2: assert(false) failed: bad AD file (Bug - P4)
  • JDK-8296916: RISC-V: Move some small macro-assembler functions to header file (Enhancement - P4)
  • JDK-8297359: RISC-V: improve performance of floating Max Min intrinsics (Enhancement - P4)
  • JDK-8297697: RISC-V: Add support for SATP mode detection (Enhancement - P4)
  • JDK-8301067: RISC-V: better error message when reporting unsupported satp modes (Enhancement - P4)
  • JDK-8297715: RISC-V: C2: Use single-bit instructions from the Zbs extension (Enhancement - P4)
  • JDK-8299168: RISC-V: Fix MachNode size mismatch for MacroAssembler::_verify_oops* (Bug - P4)
  • JDK-8299847: RISC-V: Improve PrintOptoAssembly output of CMoveI/L nodes (Bug - P5)
  • JDK-8300109: RISC-V: Improve code generation for MinI/MaxI nodes (Enhancement - P4)
  • JDK-8301033: RISC-V: Handle special cases for MinI/MaxI nodes for Zbb (Enhancement - P4)
  • JDK-8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler (Enhancement - P4)
  • JDK-8301153: RISC-V: pipeline class for several instructions is not set correctly (Bug - P4)
  • JDK-8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule (Bug - P3)
  • JDK-8301628: RISC-V: c2 fix pipeline class for several instructions (Bug - P4)
  • JDK-8301818: RISC-V: Factor out function mvw from MacroAssembler (Enhancement - P4)
  • JDK-8302114: RISC-V: Several foreign jtreg tests fail with debug build after JDK-8301818 (Bug - P4)
  • JDK-8301852: RISC-V: Optimize class atomic when order is memory_order_relaxed (Enhancement - P4)
  • JDK-8302289: RISC-V: Use bgez instruction in arraycopy_simple_check when possible (Enhancement - P4)
  • JDK-8302776: RISC-V: Fix typo CSR_INSTERT to CSR_INSTRET (Task - P5)
  • JDK-8304293: RISC-V: JDK-8276799 missed atomic intrinsic support for C1 (Enhancement - P4)
  • JDK-8305006: Use correct register in riscv_enc_fast_unlock() (Bug - P4)
  • JDK-8305008: RISC-V: Factor out immediate checking functions from assembler_riscv.inline.hpp (Enhancement - P4)
  • JDK-8305112: RISC-V: Typo fix for RVC description (Enhancement - P5)
  • JDK-8305512: RISC-V: Enable RVC extension by default on supported hardware (Enhancement - P4)
  • JDK-8305728: RISC-V: Use bexti instruction to do single-bit testing (Enhancement - P4)
  • JDK-8306667: RISC-V: Fix storeImmN0 matching rule by using zr register (Bug - P4)
  • JDK-8307150: RISC-V: Remove remaining StoreLoad barrier with UseCondCardMark for Serial/Parallel GC (Enhancement - P4)
  • JDK-8307446: RISC-V: Improve performance of floating point to integer conversion (Enhancement - P4)
  • JDK-8307651: RISC-V: stringL_indexof_char instruction has wrong format string (Enhancement - P4)
  • JDK-8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence (Bug - P4)
  • JDK-8308277: RISC-V: Improve vectorization of Match.sqrt() on floats (Enhancement - P4)
  • JDK-8308997: RISC-V: Sign extend when comparing 32-bit value with zero instead of testing the sign bit (Enhancement - P4)
  • JDK-8309427: [riscv-port-jdk17u] Remove unused RoundDoubleModeV C2 node (Bug - P4)
  • JDK-8305236: Some LoadLoad barriers in the interpreter are unnecessary after JDK-8220051 (Enhancement - P4)
  • JDK-8285630: Fix a configure error in RISC-V cross build (Bug - P4)
  • JDK-8277417: C1 LIR instruction for load-klass (Bug - P3)

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Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk17u-dev.git pull/1427/head:pull/1427
$ git checkout pull/1427

Update a local copy of the PR:
$ git checkout pull/1427
$ git pull https://git.openjdk.org/jdk17u-dev.git pull/1427/head

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Checkout this PR locally:
$ git pr checkout 1427

View PR using the GUI difftool:
$ git pr show -t 1427

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https://git.openjdk.org/jdk17u-dev/pull/1427.diff

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bridgekeeper bot commented Jun 13, 2023

👋 Welcome back fyang! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

@RealFYang RealFYang changed the title 8276799: Implementation of JEP 422: Linux/RISC-V Port Backport 5905b02c0e2643ae8d097562f181953f6c88fc89 Jun 13, 2023
@openjdk openjdk bot changed the title Backport 5905b02c0e2643ae8d097562f181953f6c88fc89 8276799: Implementation of JEP 422: Linux/RISC-V Port Jun 13, 2023
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openjdk bot commented Jun 13, 2023

This backport pull request has now been updated with issue from the original commit.

@openjdk openjdk bot added the backport label Jun 13, 2023
@VladimirKempik
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At some point in future, when this PR is approved, could you link all the bugs mentioned in your email ( to jdk-updates-dev list) to this PR via "/issue" command ( Yeah, I know it's lots of work). So we will know in jbs, if some fix/backport is present in 17u-dev or not

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At some point in future, when this PR is approved, could you link all the bugs mentioned in your email ( to jdk-updates-dev list) to this PR via "/issue" command ( Yeah, I know it's lots of work). So we will know in jbs, if some fix/backport is present in 17u-dev or not

Sure! That's on my TODO list when this draft PR is ready for review.

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/issue add 8282306,8282477,8283865,8284068,8284937,8285303,8287418,8297644,8291952,8285437,8285699,8285711,8287425,8287552,8287970,8290137,8290164,8290496,8291893,8291947,8292867,8293050,8293100,8293474,8293524,8293566,8294012,8294083,8294086,8294087,8294187,8294366,8294430,8294492,8294679,8295110,8295270,8295396,8295926,8295968,8296435,8296447,8296448,8296602,8296771,8296916,8297359,8297644,8297697,8301067,8297715,8299168,8299847,8300109,8301033,8301036,8301153,8301313,8301628,8301818,8302114,8301852,8302289,8302776,8304293,8305006,8305008,8305112,8305512,8305728,8306667,8307150,8307446,8307651,8308089,8308277,8308997,8309427,8305236

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openjdk bot commented Jun 20, 2023

@RealFYang
Adding additional issue to issue list: 8282306: os::is_first_C_frame(frame*) crashes on invalid link access.

Adding additional issue to issue list: 8282477: [x86, aarch64] vmassert(_last_Java_pc == NULL, "already walkable"); fails with async profiler.

Adding additional issue to issue list: 8283865: riscv: Break down -XX:+UseRVB into seperate options for each bitmanip extension.

Adding additional issue to issue list: 8284068: riscv: should call Atomic::release_store in JavaThread::set_thread_state.

Adding additional issue to issue list: 8284937: riscv: should not allocate special register for temp.

Adding additional issue to issue list: 8285303: riscv: Incorrect register mask in call_native_base.

Adding additional issue to issue list: 8287418: riscv: Fix correctness issue of MacroAssembler::movptr.

Adding additional issue to issue list: 8297644: RISC-V: Compilation error when shenandoah is disabled.

Adding additional issue to issue list: 8291952: riscv: Remove PRAGMA_NONNULL_IGNORED.

Adding additional issue to issue list: 8285437: riscv: Fix MachNode size mismatch for MacroAssembler::verify_oops*.

Adding additional issue to issue list: 8285699: riscv: Provide information when hitting a HaltNode.

Adding additional issue to issue list: 8285711: riscv: RVC: Support disassembler show-bytes option.

Adding additional issue to issue list: 8287425: Remove unnecessary register push for MacroAssembler::check_klass_subtype_slow_path.

Adding additional issue to issue list: 8287552: riscv: Fix comment typo in li64.

Adding additional issue to issue list: 8287970: riscv: jdk/incubator/vector/*VectorTests failing.

Adding additional issue to issue list: 8290137: riscv: small refactoring for add_memory_int32/64.

Adding additional issue to issue list: 8290164: compiler/runtime/TestConstantsInError.java fails on riscv.

Adding additional issue to issue list: 8290496: riscv: Fix build warnings-as-errors with GCC 11.

Adding additional issue to issue list: 8291893: riscv: remove fence.i used in user space.

Adding additional issue to issue list: 8291947: riscv: fail to build after JDK-8290840.

Adding additional issue to issue list: 8292867: RISC-V: Simplify weak CAS return value handling.

Adding additional issue to issue list: 8293050: RISC-V: Remove redundant non-null assertions about macro-assembler.

Adding additional issue to issue list: 8293100: RISC-V: Need to save and restore callee-saved FloatRegisters in StubGenerator::generate_call_stub.

Adding additional issue to issue list: 8293474: RISC-V: Unify the way of moving function pointer.

Adding additional issue to issue list: 8293524: RISC-V: Use macro-assembler functions as appropriate.

Adding additional issue to issue list: 8293566: RISC-V: Clean up push and pop registers.

Adding additional issue to issue list: 8294012: RISC-V: get/put_native_u8 missing the case when address&7 is 6.

Adding additional issue to issue list: 8294083: RISC-V: Minimal build failed with --disable-precompiled-headers.

Adding additional issue to issue list: 8294086: RISC-V: Cleanup InstructionMark usages in the backend.

Adding additional issue to issue list: 8294087: RISC-V: RVC: Fix a potential alignment issue and add more alignment assertions for the patchable calls/nops.

Adding additional issue to issue list: 8294187: RISC-V: Unify all relocations for the backend into AbstractAssembler::relocate().

Adding additional issue to issue list: 8294366: RISC-V: Partially mark out incompressible regions.

Adding additional issue to issue list: 8294430: RISC-V: Small refactoring for movptr_with_offset.

Adding additional issue to issue list: 8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites.

Adding additional issue to issue list: 8294679: RISC-V: Misc crash dump improvements.

Adding additional issue to issue list: 8295110: RISC-V: Mark out relocations as incompressible.

Adding additional issue to issue list: 8295270: RISC-V: Clean up and refactoring for assembler functions.

Adding additional issue to issue list: 8295396: RISC-V: Cleanup useless CompressibleRegions.

Adding additional issue to issue list: 8295926: RISC-V: C1: Fix LIRGenerator::do_LibmIntrinsic.

Adding additional issue to issue list: 8295968: RISC-V: Rename some assembler intrinsic functions for RVV 1.0.

Adding additional issue to issue list: 8296435: RISC-V: Small refactoring for increment/decrement.

Adding additional issue to issue list: 8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec.

Adding additional issue to issue list: 8296448: RISC-V: Fix temp usages of heapbase register killed by MacroAssembler::en/decode_klass_not_null.

Adding additional issue to issue list: 8296602: RISC-V: improve performance of copy_memory stub.

Adding additional issue to issue list: 8296771: RISC-V: C2: assert(false) failed: bad AD file.

Adding additional issue to issue list: 8296916: RISC-V: Move some small macro-assembler functions to header file.

Adding additional issue to issue list: 8297359: RISC-V: improve performance of floating Max Min intrinsics.

Adding additional issue to issue list: 8297644: RISC-V: Compilation error when shenandoah is disabled.

Adding additional issue to issue list: 8297697: RISC-V: Add support for SATP mode detection.

Adding additional issue to issue list: 8301067: RISC-V: better error message when reporting unsupported satp modes.

Adding additional issue to issue list: 8297715: RISC-V: C2: Use single-bit instructions from the Zbs extension.

Adding additional issue to issue list: 8299168: RISC-V: Fix MachNode size mismatch for MacroAssembler::_verify_oops*.

Adding additional issue to issue list: 8299847: RISC-V: Improve PrintOptoAssembly output of CMoveI/L nodes.

Adding additional issue to issue list: 8300109: RISC-V: Improve code generation for MinI/MaxI nodes.

Adding additional issue to issue list: 8301033: RISC-V: Handle special cases for MinI/MaxI nodes for Zbb.

Adding additional issue to issue list: 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler.

Adding additional issue to issue list: 8301153: RISC-V: pipeline class for several instructions is not set correctly.

Adding additional issue to issue list: 8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule.

Adding additional issue to issue list: 8301628: RISC-V: c2 fix pipeline class for several instructions.

Adding additional issue to issue list: 8301818: RISC-V: Factor out function mvw from MacroAssembler.

Adding additional issue to issue list: 8302114: RISC-V: Several foreign jtreg tests fail with debug build after JDK-8301818.

Adding additional issue to issue list: 8301852: RISC-V: Optimize class atomic when order is memory_order_relaxed.

Adding additional issue to issue list: 8302289: RISC-V: Use bgez instruction in arraycopy_simple_check when possible.

Adding additional issue to issue list: 8302776: RISC-V: Fix typo CSR_INSTERT to CSR_INSTRET.

Adding additional issue to issue list: 8304293: RISC-V: JDK-8276799 missed atomic intrinsic support for C1.

Adding additional issue to issue list: 8305006: Use correct register in riscv_enc_fast_unlock().

Adding additional issue to issue list: 8305008: RISC-V: Factor out immediate checking functions from assembler_riscv.inline.hpp.

Adding additional issue to issue list: 8305112: RISC-V: Typo fix for RVC description.

Adding additional issue to issue list: 8305512: RISC-V: Enable RVC extension by default on supported hardware.

Adding additional issue to issue list: 8305728: RISC-V: Use bexti instruction to do single-bit testing.

Adding additional issue to issue list: 8306667: RISC-V: Fix storeImmN0 matching rule by using zr register.

Adding additional issue to issue list: 8307150: RISC-V: Remove remaining StoreLoad barrier with UseCondCardMark for Serial/Parallel GC.

Adding additional issue to issue list: 8307446: RISC-V: Improve performance of floating point to integer conversion.

Adding additional issue to issue list: 8307651: RISC-V: stringL_indexof_char instruction has wrong format string.

Adding additional issue to issue list: 8308089: [riscv-port-jdk17u] Intrinsify Unsafe.storeStoreFence.

Adding additional issue to issue list: 8308277: RISC-V: Improve vectorization of Match.sqrt() on floats.

Adding additional issue to issue list: 8308997: RISC-V: Sign extend when comparing 32-bit value with zero instead of testing the sign bit.

Adding additional issue to issue list: 8309427: [riscv-port-jdk17u] Remove unused RoundDoubleModeV C2 node.

Adding additional issue to issue list: 8305236: Some LoadLoad barriers in the interpreter are unnecessary after JDK-8220051.

@RealFYang RealFYang marked this pull request as ready for review June 20, 2023 03:25
@openjdk openjdk bot added the rfr Pull request is ready for review label Jun 20, 2023
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mlbridge bot commented Jun 20, 2023

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Please go to https://github.com/RealFYang/jdk17u-dev/actions and enable GHA workflows, we need to make sure it does not break.

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Please go to https://github.com/RealFYang/jdk17u-dev/actions and enable GHA workflows, we need to make sure it does not break.

Done. And I have successfully triggered a GHA test for this, results are clean. Thanks for reminding.

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The majority of changes to shared part are under proper ifdefs, that looks good and safe for other platforms.

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luhenry commented Jun 21, 2023

I'm running this change on GHA with testing on RISC-V (using qemu) which should be a good smoke test (nothing more). See https://github.com/rivosinc/jdk17u-dev/actions/workflows/main.yml?query=branch%3Adev%2Fludovic%2Ftest-jdk17-riscv-backport

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luhenry commented Jun 23, 2023

It seems like it's missing 8285630, we can't cross-compile without it otherwise.

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/issue add 8285630

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RealFYang commented Jun 23, 2023

It seems like it's missing 8285630, we can't cross-compile without it otherwise.

Thanks for reporting this. Normally, we do cross-build with --openjdk-target=riscv64-unknown-linux-gnu instead of --openjdk-target=riscv64-linux-gnu, so this issue doesn't manifest. But I think it's reasonable & safe to incorporate this simple fix and I have just added another commit. Now I can cross-compile with --openjdk-target=riscv64-linux-gnu.

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openjdk bot commented Jun 23, 2023

@RealFYang
Adding additional issue to issue list: 8285630: Fix a configure error in RISC-V cross build.

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luhenry commented Jun 24, 2023

It has completed a run of this PR on GHA at https://github.com/rivosinc/jdk17u-dev/actions/runs/5356181476. There are a few failing tests but they are either timeout or related to running in QEMU.

The test suites that have been run are:

  • hs:tier1_compiler
  • hs:tier1_compiler_not_xcomp
  • hs:tier1_gc
  • hs:tier1_runtime
  • hs:tier1_serviceability
  • jdk:tier1
  • langtools:tier1

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GoeLin commented Jul 5, 2023

Isn't there anybody in the Risc-V project that can review this? It needs not necessarily be a jdk-updates reviewer. But there should be someone (maybe besides Aleksey) who will maintain this and takes the responsibility to mark this change reviewed. It would be a bad idea to admit a port that has no people that can and will review it.

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Isn't there anybody in the Risc-V project that can review this? It needs not necessarily be a jdk-updates reviewer. But there should be someone (maybe besides Aleksey) who will maintain this and takes the responsibility to mark this change reviewed. It would be a bad idea to admit a port that has no people that can and will review it.

I have looked thru linux_riscv os_cpu changes, looks good

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RealFYang commented Jul 5, 2023

@robehn : I think we have already got a fix for the reported IR Matching failure problem. Turns out that it is the test case that needs to be adapted for RISC-V. So luckily this issue should not block us from proceeding with this PR.

For 17u, the test passes with the following trivial change:

diff --git a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
index 0d3f22fad8f..d9816525fe6 100644
--- a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
+++ b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
@@ -55,11 +55,11 @@ public class IRNode {
 
     public static final String ALLOC = "(.*precise klass .*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_instance_Java" + END;
     public static final String ALLOC_OF = COMPOSITE_PREFIX + "(.*precise klass .*" + IS_REPLACED + ":.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_instance_Java" + END;
-    public static final String ALLOC_ARRAY = "(.*precise klass \\[L.*\\R((.*(?i:mov|xor|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
-    public static final String ALLOC_ARRAY_OF = COMPOSITE_PREFIX + "(.*precise klass \\[L.*" + IS_REPLACED + ";:.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
+    public static final String ALLOC_ARRAY = "(.*precise klass \\[L.*\\R((.*(?i:mov|xor|nop|spill).*|\\s*|.*(LGHI|li).*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
+    public static final String ALLOC_ARRAY_OF = COMPOSITE_PREFIX + "(.*precise klass \\[L.*" + IS_REPLACED + ";:.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*i(LGHI|li).*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
 
-    public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|or).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END;
-    public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|or).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END;
+    public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|or|mv).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END;
+    public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|or|mv).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END;
     // Does not work on s390 (a rule containing this regex will be skipped on s390).
     public static final String CHECKCAST_ARRAYCOPY = "(.*((?i:call_leaf_nofp,runtime)|CALL,\\s?runtime leaf nofp|BCTRL.*.leaf call).*checkcast_arraycopy.*" + END;

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shipilev commented Jul 5, 2023

Isn't there anybody in the Risc-V project that can review this? It needs not necessarily be a jdk-updates reviewer. But there should be someone (maybe besides Aleksey) who will maintain this and takes the responsibility to mark this change reviewed. It would be a bad idea to admit a port that has no people that can and will review it.

I think we can indeed ask other RISC-V committers to apply their reviews here.

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robehn commented Jul 5, 2023

@robehn : I think we have already got a fix for the reported IR Matching failure problem. Turns out that it is the test case that needs to be adapted for RISC-V. So luckily this issue should not block us from proceeding with this PR.

For 17u, the test passes with the following trivial change:

diff --git a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
index 0d3f22fad8f..d9816525fe6 100644
--- a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
+++ b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
@@ -55,11 +55,11 @@ public class IRNode {
 
     public static final String ALLOC = "(.*precise klass .*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_instance_Java" + END;
     public static final String ALLOC_OF = COMPOSITE_PREFIX + "(.*precise klass .*" + IS_REPLACED + ":.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_instance_Java" + END;
-    public static final String ALLOC_ARRAY = "(.*precise klass \\[L.*\\R((.*(?i:mov|xor|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
-    public static final String ALLOC_ARRAY_OF = COMPOSITE_PREFIX + "(.*precise klass \\[L.*" + IS_REPLACED + ";:.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
+    public static final String ALLOC_ARRAY = "(.*precise klass \\[L.*\\R((.*(?i:mov|xor|nop|spill).*|\\s*|.*(LGHI|li).*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
+    public static final String ALLOC_ARRAY_OF = COMPOSITE_PREFIX + "(.*precise klass \\[L.*" + IS_REPLACED + ";:.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*i(LGHI|li).*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END;
 
-    public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|or).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END;
-    public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|or).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END;
+    public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|or|mv).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END;
+    public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|or|mv).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END;
     // Does not work on s390 (a rule containing this regex will be skipped on s390).
     public static final String CHECKCAST_ARRAYCOPY = "(.*((?i:call_leaf_nofp,runtime)|CALL,\\s?runtime leaf nofp|BCTRL.*.leaf call).*checkcast_arraycopy.*" + END;

Great, thanks. Sorry I don't have time to do a full review (OOO).

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I have reviewed both the shared and riscv code. It looks good for me. Actually, I did the original backporting patch (openjdk/riscv-port-jdk17u#1) from the first pr of JEP 422 (openjdk/jdk#6294). It took a lot of effort to revert all patches irrelevant to 17, reenable patches related to 17 and make a "minimal and clean" baseline to accept subsequent series of necessary patches to be reviewed on the riscv-port-jdk17u repo (https://github.com/openjdk/riscv-port-jdk17u/pulls).

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cpu/riscv and os_cpu/linux_riscv looks good! I also participated in the backporting and reviewing of the riscv-port-jdk17u repo. All patches are reviewed by maintainers and well-tested by submitters. So I think it's good to go!

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/issue add 8277417

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openjdk bot commented Jul 7, 2023

@RealFYang
Adding additional issue to issue list: 8277417: C1 LIR instruction for load-klass.

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RealFYang commented Jul 7, 2023

I see push approval is here. Thanks @GoeLin !
And I have added back riscv-specific code for issue 8277417 which has just been integrated into jdk17u-dev.
I will perform some testing over the weekend and integrate next Monday if everything is OK.
Thanks everyone for looking at this :-)

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Got the push approval and my local tier1-3 test results are still clean. So let's integrate this.
/integrate

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openjdk bot commented Jul 10, 2023

Going to push as commit 966fc82.
Since your change was applied there has been 1 commit pushed to the master branch:

  • f02d019: 8306765: Some client related jtreg problem list entries are malformed

Your commit was automatically rebased without conflicts.

@openjdk openjdk bot added the integrated Pull request has been integrated label Jul 10, 2023
@openjdk openjdk bot closed this Jul 10, 2023
@openjdk openjdk bot removed ready Pull request is ready to be integrated rfr Pull request is ready for review labels Jul 10, 2023
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openjdk bot commented Jul 10, 2023

@RealFYang Pushed as commit 966fc82.

💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored.

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At some point in future, when this PR is approved, could you link all the bugs mentioned in your email ( to jdk-updates-dev list) to this PR via "/issue" command ( Yeah, I know it's lots of work). So we will know in jbs, if some fix/backport is present in 17u-dev or not

Sure! That's on my TODO list when this draft PR is ready for review.

Just an FYI, but this does mean a few bugs that weren't RISC-V specific have been marked as being backported to 17u twice:

  • JDK-8282306: os::is_first_C_frame(frame*) crashes on invalid link access
  • JDK-8282477: [x86, aarch64] vmassert(_last_Java_pc == NULL, "already walkable"); fails with async profiler
  • JDK-8287425: Remove unnecessary register push for MacroAssembler::check_klass_subtype_slow_path

The original includes the fix for other architectures, and presumably the RISC-V specific change is in this patch. It's not obvious from the commit log what is going on and I had to dig through to this PR to work it out. It might have been an idea to create RISC-V specific bugs for these backports.

It looks like we messed up in the same way with AArch64 too e.g. https://bugs.openjdk.org/browse/JDK-8183925 & https://bugs.openjdk.org/browse/JDK-8160748 :(

dlan17 added a commit to dlan17/gentoo that referenced this pull request Apr 11, 2024
According to [1], jdk17 gain risc-v support officially starting at 17.0.9+4,
so the riscv specific patch is no longer needed.. also see [2] for more info

I've built & tested on Milkv Poineer machine (lp64d systemd profile)

[1] https://wiki.riseproject.dev/display/HOME/LR_00_005%3A+Backport+RISC-V+support+to+jdk17u
[2] openjdk/jdk17u-dev#1427

Closes: https://bugs.gentoo.org/927145
Signed-off-by: Yixun Lan <dlan@gentoo.org>
gentoo-bot pushed a commit to gentoo/gentoo that referenced this pull request Apr 11, 2024
According to [1], jdk17 gain risc-v support officially starting at 17.0.9+4,
so the riscv specific patch is no longer needed.. also see [2] for more info

I've built & tested on Milkv Poineer machine (lp64d systemd profile)

[1] https://wiki.riseproject.dev/display/HOME/LR_00_005%3A+Backport+RISC-V+support+to+jdk17u
[2] openjdk/jdk17u-dev#1427

Closes: https://bugs.gentoo.org/927145
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Arthur Zamarin <arthurzam@gentoo.org>
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