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8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock #399
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👋 Welcome back gcao! A progress list of the required criteria for merging this PR into |
This backport pull request has now been updated with issue from the original commit. |
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@zifeihan This change now passes all automated pre-integration checks. ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details. After integration, the commit message for the final commit will be:
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@RealFYang @zifeihan Pushed as commit 3df010f. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Clean backport which fixes a potential risk for passing t0 as temporary register to MacroAssembler::lightweight_lock/unlock. This is a riscv-specific change, risk is low.
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Using
git
Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk21u.git pull/399/head:pull/399
$ git checkout pull/399
Update a local copy of the PR:
$ git checkout pull/399
$ git pull https://git.openjdk.org/jdk21u.git pull/399/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 399
View PR using the GUI difftool:
$ git pr show -t 399
Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk21u/pull/399.diff
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