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8220051: Remove global safepoint code

Reviewed-by: mdoerr, dcubed, eosterlund, bulasevich, coleenp
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robehn committed Apr 1, 2020
1 parent 8d84cf5 commit bf41f548e1e29a4d7d0f973f23fa1037ad364a93
Showing with 263 additions and 927 deletions.
  1. +2 −44 src/hotspot/cpu/aarch64/aarch64.ad
  2. +2 −5 src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp
  3. +1 −3 src/hotspot/cpu/aarch64/globalDefinitions_aarch64.hpp
  4. +2 −3 src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp
  5. +9 −28 src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
  6. +3 −3 src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp
  7. +1 −1 src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
  8. +0 −32 src/hotspot/cpu/arm/arm.ad
  9. +0 −2 src/hotspot/cpu/arm/globalDefinitions_arm.hpp
  10. +1 −2 src/hotspot/cpu/arm/interp_masm_arm.cpp
  11. +4 −14 src/hotspot/cpu/arm/macroAssembler_arm.cpp
  12. +7 −9 src/hotspot/cpu/arm/sharedRuntime_arm.cpp
  13. +3 −11 src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp
  14. +1 −2 src/hotspot/cpu/ppc/globalDefinitions_ppc.hpp
  15. +2 −2 src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp
  16. +5 −10 src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
  17. +2 −2 src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp
  18. +2 −2 src/hotspot/cpu/ppc/nativeInst_ppc.hpp
  19. +2 −14 src/hotspot/cpu/ppc/ppc.ad
  20. +1 −1 src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp
  21. +2 −2 src/hotspot/cpu/ppc/templateTable_ppc_64.cpp
  22. +3 −13 src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp
  23. +1 −3 src/hotspot/cpu/s390/globalDefinitions_s390.hpp
  24. +2 −2 src/hotspot/cpu/s390/interp_masm_s390.cpp
  25. +5 −11 src/hotspot/cpu/s390/macroAssembler_s390.cpp
  26. +2 −12 src/hotspot/cpu/s390/s390.ad
  27. +2 −2 src/hotspot/cpu/s390/sharedRuntime_s390.cpp
  28. +2 −2 src/hotspot/cpu/s390/templateTable_s390.cpp
  29. +3 −11 src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp
  30. +0 −3 src/hotspot/cpu/sparc/globalDefinitions_sparc.hpp
  31. +2 −2 src/hotspot/cpu/sparc/interp_masm_sparc.cpp
  32. +5 −13 src/hotspot/cpu/sparc/macroAssembler_sparc.cpp
  33. +2 −2 src/hotspot/cpu/sparc/sharedRuntime_sparc.cpp
  34. +3 −44 src/hotspot/cpu/sparc/sparc.ad
  35. +2 −2 src/hotspot/cpu/sparc/templateTable_sparc.cpp
  36. +0 −9 src/hotspot/cpu/x86/assembler_x86.cpp
  37. +1 −2 src/hotspot/cpu/x86/assembler_x86.hpp
  38. +21 −47 src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp
  39. +2 −2 src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp
  40. +0 −2 src/hotspot/cpu/x86/globalDefinitions_x86.hpp
  41. +2 −2 src/hotspot/cpu/x86/interp_masm_x86.cpp
  42. +3 −20 src/hotspot/cpu/x86/jvmciCodeInstaller_x86.cpp
  43. +7 −13 src/hotspot/cpu/x86/macroAssembler_x86.cpp
  44. +7 −34 src/hotspot/cpu/x86/nativeInst_x86.hpp
  45. +1 −23 src/hotspot/cpu/x86/relocInfo_x86.cpp
  46. +1 −1 src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp
  47. +1 −1 src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp
  48. +2 −2 src/hotspot/cpu/x86/templateTable_x86.cpp
  49. +7 −55 src/hotspot/cpu/x86/x86_32.ad
  50. +7 −72 src/hotspot/cpu/x86/x86_64.ad
  51. +1 −3 src/hotspot/cpu/zero/globalDefinitions_zero.hpp
  52. +0 −15 src/hotspot/os/aix/os_aix.cpp
  53. +7 −4 src/hotspot/os/aix/safepointMechanism_aix.cpp
  54. +0 −14 src/hotspot/os/bsd/os_bsd.cpp
  55. +0 −14 src/hotspot/os/linux/os_linux.cpp
  56. +0 −16 src/hotspot/os/solaris/os_solaris.cpp
  57. +2 −19 src/hotspot/os/windows/os_windows.cpp
  58. +3 −3 src/hotspot/os_cpu/aix_ppc/os_aix_ppc.cpp
  59. +2 −1 src/hotspot/os_cpu/bsd_x86/os_bsd_x86.cpp
  60. +2 −1 src/hotspot/os_cpu/linux_aarch64/os_linux_aarch64.cpp
  61. +2 −1 src/hotspot/os_cpu/linux_arm/os_linux_arm.cpp
  62. +2 −2 src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp
  63. +2 −1 src/hotspot/os_cpu/linux_s390/os_linux_s390.cpp
  64. +2 −1 src/hotspot/os_cpu/linux_sparc/os_linux_sparc.cpp
  65. +2 −1 src/hotspot/os_cpu/linux_x86/os_linux_x86.cpp
  66. +2 −1 src/hotspot/os_cpu/solaris_sparc/os_solaris_sparc.cpp
  67. +2 −1 src/hotspot/os_cpu/solaris_x86/os_solaris_x86.cpp
  68. +0 −1 src/hotspot/share/aot/aotCodeHeap.cpp
  69. +1 −3 src/hotspot/share/gc/shenandoah/shenandoahHeap.cpp
  70. +1 −6 src/hotspot/share/gc/z/zMark.cpp
  71. +1 −4 src/hotspot/share/opto/callnode.cpp
  72. +2 −3 src/hotspot/share/opto/machnode.cpp
  73. +1 −4 src/hotspot/share/opto/machnode.hpp
  74. +7 −14 src/hotspot/share/opto/parse1.cpp
  75. +2 −3 src/hotspot/share/runtime/biasedLocking.cpp
  76. +8 −46 src/hotspot/share/runtime/handshake.cpp
  77. +0 −7 src/hotspot/share/runtime/os.hpp
  78. +8 −47 src/hotspot/share/runtime/safepoint.cpp
  79. +30 −41 src/hotspot/share/runtime/safepointMechanism.cpp
  80. +4 −9 src/hotspot/share/runtime/safepointMechanism.hpp
  81. +3 −7 src/hotspot/share/runtime/safepointMechanism.inline.hpp
  82. +11 −20 src/hotspot/share/runtime/sweeper.cpp
  83. +1 −3 src/hotspot/share/runtime/thread.cpp
  84. +3 −2 src/hotspot/share/utilities/vmError.cpp
  85. +0 −5 ...dk.aot/share/classes/jdk.tools.jaotc.binformat/src/jdk/tools/jaotc/binformat/BinaryContainer.java
  86. +1 −5 src/jdk.aot/share/classes/jdk.tools.jaotc/src/jdk/tools/jaotc/MarkProcessor.java
@@ -1696,7 +1696,7 @@ void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {

if (do_polling() && C->is_method_compilation()) {
st->print("# touch polling page\n\t");
st->print("mov rscratch1, #0x%lx\n\t", p2i(os::get_polling_page()));
st->print("ldr rscratch1, [rthread],#polling_page_offset\n\t");
st->print("ldr zr, [rscratch1]");
}
}
@@ -1714,7 +1714,7 @@ void MachEpilogNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
}

if (do_polling() && C->is_method_compilation()) {
__ read_polling_page(rscratch1, os::get_polling_page(), relocInfo::poll_return_type);
__ fetch_and_read_polling_page(rscratch1, relocInfo::poll_return_type);
}
}

@@ -1732,14 +1732,6 @@ const Pipeline * MachEpilogNode::pipeline() const {
return MachNode::pipeline_class();
}

// This method seems to be obsolete. It is declared in machnode.hpp
// and defined in all *.ad files, but it is never called. Should we
// get rid of it?
int MachEpilogNode::safepoint_offset() const {
assert(do_polling(), "no return for this epilog node");
return 4;
}

//=============================================================================

// Figure out which register class each belongs in: rc_int, rc_float or
@@ -3177,15 +3169,6 @@ encode %{
__ mov(dst_reg, (u_int64_t)1);
%}

enc_class aarch64_enc_mov_poll_page(iRegP dst, immPollPage src) %{
C2_MacroAssembler _masm(&cbuf);
address page = (address)$src$$constant;
Register dst_reg = as_Register($dst$$reg);
unsigned long off;
__ adrp(dst_reg, Address(page, relocInfo::poll_type), off);
assert(off == 0, "assumed offset == 0");
%}

enc_class aarch64_enc_mov_byte_map_base(iRegP dst, immByteMapBase src) %{
C2_MacroAssembler _masm(&cbuf);
__ load_byte_map_base($dst$$Register);
@@ -4378,17 +4361,6 @@ operand immP_1()
interface(CONST_INTER);
%}

// Polling Page Pointer Immediate
operand immPollPage()
%{
predicate((address)n->get_ptr() == os::get_polling_page());
match(ConP);

op_cost(0);
format %{ %}
interface(CONST_INTER);
%}

// Card Table Byte Map Base
operand immByteMapBase()
%{
@@ -7185,20 +7157,6 @@ instruct loadConP1(iRegPNoSp dst, immP_1 con)
ins_pipe(ialu_imm);
%}

// Load Poll Page Constant

instruct loadConPollPage(iRegPNoSp dst, immPollPage con)
%{
match(Set dst con);

ins_cost(INSN_COST);
format %{ "adr $dst, $con\t# Poll Page Ptr" %}

ins_encode(aarch64_enc_mov_poll_page(dst, con));

ins_pipe(ialu_imm);
%}

// Load Byte Map Base Constant

instruct loadByteMapBase(iRegPNoSp dst, immByteMapBase con)
@@ -501,16 +501,13 @@ void LIR_Assembler::return_op(LIR_Opr result) {
__ reserved_stack_check();
}

address polling_page(os::get_polling_page());
__ read_polling_page(rscratch1, polling_page, relocInfo::poll_return_type);
__ fetch_and_read_polling_page(rscratch1, relocInfo::poll_return_type);
__ ret(lr);
}

int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) {
address polling_page(os::get_polling_page());
guarantee(info != NULL, "Shouldn't be NULL");
assert(os::is_poll_address(polling_page), "should be");
__ get_polling_page(rscratch1, polling_page, relocInfo::poll_type);
__ get_polling_page(rscratch1, relocInfo::poll_type);
add_debug_info_for_branch(info); // This isn't just debug info:
// it's the oop map
__ read_polling_page(rscratch1, relocInfo::poll_type);
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2020, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@@ -56,8 +56,6 @@ const bool CCallingConventionRequiresIntsAsLongs = false;

#define SUPPORT_RESERVED_STACK_AREA

#define THREAD_LOCAL_POLL

#define PREFERRED_METASPACE_ALIGNMENT

#endif // CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@@ -469,8 +469,7 @@ void InterpreterMacroAssembler::dispatch_base(TosState state,

Label safepoint;
address* const safepoint_table = Interpreter::safept_table(state);
bool needs_thread_local_poll = generate_poll &&
SafepointMechanism::uses_thread_local_poll() && table != safepoint_table;
bool needs_thread_local_poll = generate_poll && table != safepoint_table;

if (needs_thread_local_poll) {
NOT_PRODUCT(block_comment("Thread-local Safepoint poll"));
@@ -291,16 +291,8 @@ address MacroAssembler::target_addr_for_insn(address insn_addr, unsigned insn) {
}

void MacroAssembler::safepoint_poll(Label& slow_path) {
if (SafepointMechanism::uses_thread_local_poll()) {
ldr(rscratch1, Address(rthread, Thread::polling_page_offset()));
tbnz(rscratch1, exact_log2(SafepointMechanism::poll_bit()), slow_path);
} else {
unsigned long offset;
adrp(rscratch1, ExternalAddress(SafepointSynchronize::address_of_state()), offset);
ldrw(rscratch1, Address(rscratch1, offset));
assert(SafepointSynchronize::_not_synchronized == 0, "rewrite this code");
cbnz(rscratch1, slow_path);
}
ldr(rscratch1, Address(rthread, Thread::polling_page_offset()));
tbnz(rscratch1, exact_log2(SafepointMechanism::poll_bit()), slow_path);
}

// Just like safepoint_poll, but use an acquiring load for thread-
@@ -316,13 +308,9 @@ void MacroAssembler::safepoint_poll(Label& slow_path) {
// racing the code which wakes up from a safepoint.
//
void MacroAssembler::safepoint_poll_acquire(Label& slow_path) {
if (SafepointMechanism::uses_thread_local_poll()) {
lea(rscratch1, Address(rthread, Thread::polling_page_offset()));
ldar(rscratch1, rscratch1);
tbnz(rscratch1, exact_log2(SafepointMechanism::poll_bit()), slow_path);
} else {
safepoint_poll(slow_path);
}
lea(rscratch1, Address(rthread, Thread::polling_page_offset()));
ldar(rscratch1, rscratch1);
tbnz(rscratch1, exact_log2(SafepointMechanism::poll_bit()), slow_path);
}

void MacroAssembler::reset_last_Java_frame(bool clear_fp) {
@@ -4305,22 +4293,15 @@ void MacroAssembler::bang_stack_size(Register size, Register tmp) {
}
}


// Move the address of the polling page into dest.
void MacroAssembler::get_polling_page(Register dest, address page, relocInfo::relocType rtype) {
if (SafepointMechanism::uses_thread_local_poll()) {
ldr(dest, Address(rthread, Thread::polling_page_offset()));
} else {
unsigned long off;
adrp(dest, Address(page, rtype), off);
assert(off == 0, "polling page must be page aligned");
}
void MacroAssembler::get_polling_page(Register dest, relocInfo::relocType rtype) {
ldr(dest, Address(rthread, Thread::polling_page_offset()));
}

// Move the address of the polling page into r, then read the polling
// page.
address MacroAssembler::read_polling_page(Register r, address page, relocInfo::relocType rtype) {
get_polling_page(r, page, rtype);
address MacroAssembler::fetch_and_read_polling_page(Register r, relocInfo::relocType rtype) {
get_polling_page(r, rtype);
return read_polling_page(r, rtype);
}

@@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@@ -1217,9 +1217,9 @@ class MacroAssembler: public Assembler {
}
}

address read_polling_page(Register r, address page, relocInfo::relocType rtype);
address read_polling_page(Register r, relocInfo::relocType rtype);
void get_polling_page(Register dest, address page, relocInfo::relocType rtype);
void get_polling_page(Register dest, relocInfo::relocType rtype);
address fetch_and_read_polling_page(Register r, relocInfo::relocType rtype);

// CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic.
void update_byte_crc32(Register crc, Register val, Register table);
@@ -2807,7 +2807,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t
__ bind(noException);

Label no_adjust, bail;
if (SafepointMechanism::uses_thread_local_poll() && !cause_return) {
if (!cause_return) {
// If our stashed return pc was modified by the runtime we avoid touching it
__ ldr(rscratch1, Address(rfp, wordSize));
__ cmp(r20, rscratch1);
@@ -367,13 +367,6 @@ const Pipeline * MachEpilogNode::pipeline() const {
return MachNode::pipeline_class();
}

int MachEpilogNode::safepoint_offset() const {
assert( do_polling(), "no return for this epilog node");
// return MacroAssembler::size_of_sethi(os::get_polling_page());
Unimplemented();
return 0;
}

//=============================================================================

// Figure out which register class each belongs in: rc_int, rc_float, rc_stack
@@ -2021,15 +2014,6 @@ operand immP0() %{
interface(CONST_INTER);
%}

operand immP_poll() %{
predicate(n->get_ptr() != 0 && n->get_ptr() == (intptr_t)os::get_polling_page());
match(ConP);

// formats are generated automatically for constants and base registers
format %{ %}
interface(CONST_INTER);
%}

// Pointer Immediate
operand immN()
%{
@@ -3098,12 +3082,6 @@ pipe_class loadConP( iRegP dst, immP src ) %{
fixed_latency(6);
%}

// Polling Address
pipe_class loadConP_poll( iRegP dst, immP_poll src ) %{
dst : E(write);
IALU : R;
%}

// Long Constant small
pipe_class loadConLlo( iRegL dst, immL src ) %{
instruction_count(2);
@@ -4286,16 +4264,6 @@ instruct loadConP(iRegP dst, immP src) %{
%}


instruct loadConP_poll(iRegP dst, immP_poll src) %{
match(Set dst src);
ins_cost(DEFAULT_COST);
format %{ "MOV_SLOW $dst,$src\t!ptr" %}
ins_encode %{
__ mov_slow($dst$$Register, $src$$constant);
%}
ins_pipe(loadConP_poll);
%}

instruct loadConL(iRegL dst, immL src) %{
match(Set dst src);
ins_cost(DEFAULT_COST * 4);
@@ -62,6 +62,4 @@ const bool HaveVFP = true;
#endif
#endif

#define THREAD_LOCAL_POLL

#endif // CPU_ARM_GLOBALDEFINITIONS_ARM_HPP
@@ -576,8 +576,7 @@ void InterpreterMacroAssembler::dispatch_base(TosState state,
Label safepoint;
address* const safepoint_table = Interpreter::safept_table(state);
address* const table = Interpreter::dispatch_table(state);
bool needs_thread_local_poll = generate_poll &&
SafepointMechanism::uses_thread_local_poll() && table != safepoint_table;
bool needs_thread_local_poll = generate_poll && table != safepoint_table;

if (needs_thread_local_poll) {
NOT_PRODUCT(block_comment("Thread-local Safepoint poll"));
@@ -1920,23 +1920,13 @@ void MacroAssembler::resolve(DecoratorSet decorators, Register obj) {
}

void MacroAssembler::safepoint_poll(Register tmp1, Label& slow_path) {
if (SafepointMechanism::uses_thread_local_poll()) {
ldr_u32(tmp1, Address(Rthread, Thread::polling_page_offset()));
tst(tmp1, exact_log2(SafepointMechanism::poll_bit()));
b(slow_path, eq);
} else {
ldr_global_s32(tmp1, SafepointSynchronize::address_of_state());
cmp(tmp1, SafepointSynchronize::_not_synchronized);
b(slow_path, ne);
}
ldr_u32(tmp1, Address(Rthread, Thread::polling_page_offset()));
tst(tmp1, exact_log2(SafepointMechanism::poll_bit()));
b(slow_path, eq);
}

void MacroAssembler::get_polling_page(Register dest) {
if (SafepointMechanism::uses_thread_local_poll()) {
ldr(dest, Address(Rthread, Thread::polling_page_offset()));
} else {
mov_address(dest, os::get_polling_page());
}
ldr(dest, Address(Rthread, Thread::polling_page_offset()));
}

void MacroAssembler::read_polling_page(Register dest, relocInfo::relocType rtype) {
@@ -1802,15 +1802,13 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t
__ reset_last_Java_frame(Rtemp); // Rtemp free since scratched by far call

if (!cause_return) {
if (SafepointMechanism::uses_thread_local_poll()) {
// If our stashed return pc was modified by the runtime we avoid touching it
__ ldr(R3_tmp, Address(Rthread, JavaThread::saved_exception_pc_offset()));
__ ldr(R2_tmp, Address(SP, RegisterSaver::LR_offset * wordSize));
__ cmp(R2_tmp, R3_tmp);
// Adjust return pc forward to step over the safepoint poll instruction
__ add(R2_tmp, R2_tmp, 4, eq);
__ str(R2_tmp, Address(SP, RegisterSaver::LR_offset * wordSize), eq);
}
// If our stashed return pc was modified by the runtime we avoid touching it
__ ldr(R3_tmp, Address(Rthread, JavaThread::saved_exception_pc_offset()));
__ ldr(R2_tmp, Address(SP, RegisterSaver::LR_offset * wordSize));
__ cmp(R2_tmp, R3_tmp);
// Adjust return pc forward to step over the safepoint poll instruction
__ add(R2_tmp, R2_tmp, 4, eq);
__ str(R2_tmp, Address(SP, RegisterSaver::LR_offset * wordSize), eq);

// Check for pending exception
__ ldr(Rtemp, Address(Rthread, Thread::pending_exception_offset()));
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2019, SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@@ -1335,11 +1335,7 @@ void LIR_Assembler::return_op(LIR_Opr result) {
__ pop_frame();
}

if (SafepointMechanism::uses_thread_local_poll()) {
__ ld(polling_page, in_bytes(Thread::polling_page_offset()), R16_thread);
} else {
__ load_const_optimized(polling_page, (long)(address) os::get_polling_page(), R0);
}
__ ld(polling_page, in_bytes(Thread::polling_page_offset()), R16_thread);

// Restore return pc relative to callers' sp.
__ ld(return_pc, _abi(lr), R1_SP);
@@ -1362,11 +1358,7 @@ void LIR_Assembler::return_op(LIR_Opr result) {

int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) {
const Register poll_addr = tmp->as_register();
if (SafepointMechanism::uses_thread_local_poll()) {
__ ld(poll_addr, in_bytes(Thread::polling_page_offset()), R16_thread);
} else {
__ load_const_optimized(poll_addr, (intptr_t)os::get_polling_page(), R0);
}
__ ld(poll_addr, in_bytes(Thread::polling_page_offset()), R16_thread);
if (info != NULL) {
add_debug_info_for_branch(info);
}

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