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8238683: C2: Remove Use24BitFP and Use24BitFPMode flags

Reviewed-by: thartmann, neliasso
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Vladimir Ivanov
Vladimir Ivanov committed Feb 11, 2020
1 parent 74e68b4 commit 5e9dc46d21dc047f652f2660dd502644bcbd934e
@@ -471,7 +471,7 @@ void ArchDesc::buildDFA(FILE* fp) {


class dfa_shared_preds {
enum { count = 4 };
enum { count = 3 IA32_ONLY( + 1 ) };

static bool _found[count];
static const char* _type [count];
@@ -582,15 +582,10 @@ class dfa_shared_preds {
}
};
// shared predicates, _var and _pred entry should be the same length
bool dfa_shared_preds::_found[dfa_shared_preds::count]
= { false, false, false, false };
const char* dfa_shared_preds::_type[dfa_shared_preds::count]
= { "int", "jlong", "intptr_t", "bool" };
const char* dfa_shared_preds::_var [dfa_shared_preds::count]
= { "_n_get_int__", "_n_get_long__", "_n_get_intptr_t__", "Compile__current____select_24_bit_instr__" };
const char* dfa_shared_preds::_pred[dfa_shared_preds::count]
= { "n->get_int()", "n->get_long()", "n->get_intptr_t()", "Compile::current()->select_24_bit_instr()" };

bool dfa_shared_preds::_found[dfa_shared_preds::count] = { false, false, false IA32_ONLY(COMMA false) };
const char* dfa_shared_preds::_type [dfa_shared_preds::count] = { "int", "jlong", "intptr_t" IA32_ONLY(COMMA "bool") };
const char* dfa_shared_preds::_var [dfa_shared_preds::count] = { "_n_get_int__", "_n_get_long__", "_n_get_intptr_t__" IA32_ONLY(COMMA "Compile__current____select_24_bit_instr__") };
const char* dfa_shared_preds::_pred [dfa_shared_preds::count] = { "n->get_int()", "n->get_long()", "n->get_intptr_t()" IA32_ONLY(COMMA "Compile::current()->select_24_bit_instr()") };

void ArchDesc::gen_dfa_state_body(FILE* fp, Dict &minimize, ProductionState &status, Dict &operands_chained_from, int i) {
// Start the body of each Op_XXX sub-dfa with a clean state.
@@ -611,12 +611,6 @@
develop(bool, ConvertFloat2IntClipping, true, \
"Convert float2int clipping idiom to integer clipping") \
\
develop(bool, Use24BitFPMode, true, \
"Set 24-bit FPU mode on a per-compile basis ") \
\
develop(bool, Use24BitFP, true, \
"use FP instructions that produce 24-bit precise results") \
\
develop(bool, MonomorphicArrayCheck, true, \
"Uncommon-trap array store checks that require full type check") \
\
@@ -1094,7 +1094,7 @@ void Compile::Init(int aliaslevel) {
_matcher = NULL; // filled in later
_cfg = NULL; // filled in later

set_24_bit_selection_and_mode(Use24BitFP, false);
IA32_ONLY( set_24_bit_selection_and_mode(true, false); )

_node_note_array = NULL;
_default_node_notes = NULL;
@@ -3713,14 +3713,16 @@ bool Compile::final_graph_reshaping() {
}
}

#ifdef IA32
// If original bytecodes contained a mixture of floats and doubles
// check if the optimizer has made it homogenous, item (3).
if( Use24BitFPMode && Use24BitFP && UseSSE == 0 &&
if (UseSSE == 0 &&
frc.get_float_count() > 32 &&
frc.get_double_count() == 0 &&
(10 * frc.get_call_count() < frc.get_float_count()) ) {
set_24_bit_selection_and_mode( false, true );
set_24_bit_selection_and_mode(false, true);
}
#endif // IA32

set_java_calls(frc.get_java_call_count());
set_inner_loops(frc.get_inner_loop_count());
@@ -582,8 +582,6 @@ class Compile : public Phase {
private:
// Matching, CFG layout, allocation, code generation
PhaseCFG* _cfg; // Results of CFG finding
bool _select_24_bit_instr; // We selected an instruction with a 24-bit result
bool _in_24_bit_fp_mode; // We are emitting instructions with 24-bit results
int _java_calls; // Number of java calls in the method
int _inner_loops; // Number of inner loops in the method
Matcher* _matcher; // Engine to map ideal to machine instructions
@@ -1122,8 +1120,6 @@ class Compile : public Phase {

// Matching, CFG layout, allocation, code generation
PhaseCFG* cfg() { return _cfg; }
bool select_24_bit_instr() const { return _select_24_bit_instr; }
bool in_24_bit_fp_mode() const { return _in_24_bit_fp_mode; }
bool has_java_calls() const { return _java_calls > 0; }
int java_calls() const { return _java_calls; }
int inner_loops() const { return _inner_loops; }
@@ -1155,12 +1151,6 @@ class Compile : public Phase {
void set_indexSet_arena(Arena* a) { _indexSet_arena = a; }
void set_indexSet_free_block_list(void* p) { _indexSet_free_block_list = p; }

// Remember if this compilation changes hardware mode to 24-bit precision
void set_24_bit_selection_and_mode(bool selection, bool mode) {
_select_24_bit_instr = selection;
_in_24_bit_fp_mode = mode;
}

void set_java_calls(int z) { _java_calls = z; }
void set_inner_loops(int z) { _inner_loops = z; }

@@ -1413,6 +1403,22 @@ class Compile : public Phase {
bool needs_clinit_barrier(ciField* ik, ciMethod* accessing_method);
bool needs_clinit_barrier(ciMethod* ik, ciMethod* accessing_method);
bool needs_clinit_barrier(ciInstanceKlass* ik, ciMethod* accessing_method);

#ifdef IA32
private:
bool _select_24_bit_instr; // We selected an instruction with a 24-bit result
bool _in_24_bit_fp_mode; // We are emitting instructions with 24-bit results

// Remember if this compilation changes hardware mode to 24-bit precision.
void set_24_bit_selection_and_mode(bool selection, bool mode) {
_select_24_bit_instr = selection;
_in_24_bit_fp_mode = mode;
}

public:
bool select_24_bit_instr() const { return _select_24_bit_instr; }
bool in_24_bit_fp_mode() const { return _in_24_bit_fp_mode; }
#endif // IA32
};

#endif // SHARE_OPTO_COMPILE_HPP

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