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JesperIRL committed Jan 13, 2020
2 parents 1b24cf8 + ea152dc commit 913b8702d17ecb3676d9581cb96f9880f096856d
Showing with 834 additions and 306 deletions.
  1. +2 −2 src/hotspot/cpu/s390/c1_CodeStubs_s390.cpp
  2. +10 −10 src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp
  3. +8 −9 src/hotspot/cpu/s390/c1_MacroAssembler_s390.cpp
  4. +3 −3 src/hotspot/cpu/s390/c1_Runtime1_s390.cpp
  5. +2 −2 src/hotspot/cpu/s390/gc/g1/g1BarrierSetAssembler_s390.cpp
  6. +1 −1 src/hotspot/cpu/s390/gc/shared/barrierSetAssembler_s390.cpp
  7. +2 −2 src/hotspot/cpu/s390/interp_masm_s390.cpp
  8. +78 −10 src/hotspot/cpu/s390/macroAssembler_s390.cpp
  9. +7 −0 src/hotspot/cpu/s390/macroAssembler_s390.hpp
  10. +6 −6 src/hotspot/cpu/s390/methodHandles_s390.cpp
  11. +4 −4 src/hotspot/cpu/s390/sharedRuntime_s390.cpp
  12. +16 −0 src/hotspot/cpu/s390/stubGenerator_s390.cpp
  13. +2 −0 src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp
  14. +9 −1 src/hotspot/share/code/debugInfo.cpp
  15. +2 −1 src/hotspot/share/gc/shenandoah/shenandoahRootProcessor.hpp
  16. +4 −1 src/hotspot/share/gc/shenandoah/shenandoahRootProcessor.inline.hpp
  17. +1 −4 src/hotspot/share/gc/shenandoah/shenandoahTraversalGC.cpp
  18. +1 −31 src/hotspot/share/jfr/metadata/metadata.xml
  19. +18 −37 src/hotspot/share/jfr/recorder/service/jfrRecorderService.cpp
  20. +4 −4 src/hotspot/share/opto/parse2.cpp
  21. +1 −1 src/hotspot/share/utilities/count_leading_zeros.hpp
  22. +9 −10 src/java.base/share/classes/java/lang/Class.java
  23. +2 −1 src/java.base/share/classes/java/lang/annotation/ElementType.java
  24. +1 −1 src/java.base/share/classes/java/lang/invoke/MethodHandles.java
  25. +1 −1 src/jdk.compiler/share/classes/com/sun/tools/javac/comp/Flow.java
  26. +2 −2 src/jdk.compiler/share/classes/com/sun/tools/javac/parser/JavacParser.java
  27. +1 −8 src/jdk.jdeps/share/classes/com/sun/tools/jdeps/ClassFileReader.java
  28. +15 −10 src/jdk.jdeps/share/classes/com/sun/tools/jdeps/JdepsTask.java
  29. +53 −23 src/jdk.jdeps/share/classes/com/sun/tools/jdeps/ModuleAnalyzer.java
  30. +24 −11 src/jdk.jdeps/share/classes/com/sun/tools/jdeps/ModuleInfoBuilder.java
  31. +3 −4 src/jdk.jdeps/share/classes/com/sun/tools/jdeps/resources/jdeps.properties
  32. +1 −26 src/jdk.jfr/share/conf/jfr/default.jfc
  33. +1 −26 src/jdk.jfr/share/conf/jfr/profile.jfc
  34. +2 −1 src/jdk.jshell/share/classes/jdk/internal/jshell/tool/Feedback.java
  35. +7 −1 src/jdk.jshell/share/classes/jdk/internal/jshell/tool/JShellTool.java
  36. +8 −6 src/jdk.jshell/share/classes/jdk/internal/jshell/tool/resources/l10n.properties
  37. +22 −4 src/jdk.jshell/share/classes/jdk/jshell/Corraller.java
  38. +61 −0 test/hotspot/jtreg/compiler/c2/TestJumpTable.java
  39. +10 −1 test/hotspot/jtreg/gc/shenandoah/jvmti/TestHeapDump.java
  40. +2 −1 test/hotspot/jtreg/serviceability/jvmti/CompiledMethodLoad/libCompiledZombie.cpp
  41. +10 −4 test/jdk/java/foreign/TestArrays.java
  42. +22 −4 test/jdk/java/foreign/TestByteBuffer.java
  43. +2 −1 test/jdk/java/foreign/TestMemoryAlignment.java
  44. +3 −2 test/jdk/java/foreign/TestSegments.java
  45. +17 −16 test/jdk/java/foreign/libNativeAccess.c
  46. +3 −3 test/jdk/tools/jlink/plugins/IncludeLocalesPluginTest.java
  47. +22 −2 test/langtools/jdk/jshell/RecordsTest.java
  48. +5 −1 test/langtools/jdk/jshell/ToolLocalSimpleTest.java
  49. +12 −2 test/langtools/jdk/jshell/ToolSimpleTest.java
  50. +11 −0 test/langtools/tools/javac/records/RecordCompilationTests.java
  51. +9 −2 test/langtools/tools/javac/switchexpr/ExpressionSwitchEmbedding.java
  52. +138 −0 test/langtools/tools/jdeps/missingDeps/MissingDepsTest.java
  53. +32 −0 test/langtools/tools/jdeps/missingDeps/p/internal/X.java
  54. +27 −0 test/langtools/tools/jdeps/missingDeps/src/m1/module-info.java
  55. +29 −0 test/langtools/tools/jdeps/missingDeps/src/m1/p/Foo.java
  56. +26 −0 test/langtools/tools/jdeps/missingDeps/src/m2/module-info.java
  57. +30 −0 test/langtools/tools/jdeps/missingDeps/src/m2/q/Bar.java
  58. +27 −0 test/langtools/tools/jdeps/missingDeps/src/m2/q/T.java
  59. +3 −3 test/langtools/tools/jdeps/modules/CheckModuleTest.java
@@ -294,7 +294,7 @@ void PatchingStub::align_patch_site(MacroAssembler* masm) {
void PatchingStub::emit_code(LIR_Assembler* ce) {
// Copy original code here.
assert(NativeGeneralJump::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF,
"not enough room for call");
"not enough room for call, need %d", _bytes_to_copy);

NearLabel call_patch;

@@ -331,7 +331,7 @@ void PatchingStub::emit_code(LIR_Assembler* ce) {
}
#endif
} else {
// Make a copy the code which is going to be patched.
// Make a copy of the code which is going to be patched.
for (int i = 0; i < _bytes_to_copy; i++) {
address ptr = (address)(_pc_start + i);
int a_byte = (*ptr) & 0xFF;
@@ -897,7 +897,7 @@ void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type, LIR_P
bool needs_patching = (patch_code != lir_patch_none);

if (addr->base()->type() == T_OBJECT) {
__ verify_oop(src);
__ verify_oop(src, FILE_AND_LINE);
}

PatchingStub* patch = NULL;
@@ -972,7 +972,7 @@ void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type, LIR_P
} else {
__ z_lg(dest->as_register(), disp_value, disp_reg, src);
}
__ verify_oop(dest->as_register());
__ verify_oop(dest->as_register(), FILE_AND_LINE);
break;
}
case T_FLOAT:
@@ -1006,7 +1006,7 @@ void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) {
if (dest->is_single_cpu()) {
if (is_reference_type(type)) {
__ mem2reg_opt(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix()), true);
__ verify_oop(dest->as_register());
__ verify_oop(dest->as_register(), FILE_AND_LINE);
} else if (type == T_METADATA || type == T_ADDRESS) {
__ mem2reg_opt(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix()), true);
} else {
@@ -1033,7 +1033,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool po
if (src->is_single_cpu()) {
const Address dst = frame_map()->address_for_slot(dest->single_stack_ix());
if (is_reference_type(type)) {
__ verify_oop(src->as_register());
__ verify_oop(src->as_register(), FILE_AND_LINE);
__ reg2mem_opt(src->as_register(), dst, true);
} else if (type == T_METADATA || type == T_ADDRESS) {
__ reg2mem_opt(src->as_register(), dst, true);
@@ -1079,7 +1079,7 @@ void LIR_Assembler::reg2reg(LIR_Opr from_reg, LIR_Opr to_reg) {
ShouldNotReachHere();
}
if (is_reference_type(to_reg->type())) {
__ verify_oop(to_reg->as_register());
__ verify_oop(to_reg->as_register(), FILE_AND_LINE);
}
}

@@ -1095,7 +1095,7 @@ void LIR_Assembler::reg2mem(LIR_Opr from, LIR_Opr dest_opr, BasicType type,
bool needs_patching = (patch_code != lir_patch_none);

if (addr->base()->is_oop_register()) {
__ verify_oop(dest);
__ verify_oop(dest, FILE_AND_LINE);
}

PatchingStub* patch = NULL;
@@ -1130,7 +1130,7 @@ void LIR_Assembler::reg2mem(LIR_Opr from, LIR_Opr dest_opr, BasicType type,
assert(disp_reg != Z_R0 || Immediate::is_simm20(disp_value), "should have set this up");

if (is_reference_type(type)) {
__ verify_oop(from->as_register());
__ verify_oop(from->as_register(), FILE_AND_LINE);
}

bool short_disp = Immediate::is_uimm12(disp_value);
@@ -2412,7 +2412,7 @@ void LIR_Assembler::emit_alloc_obj(LIR_OpAllocObj* op) {
op->klass()->as_register(),
*op->stub()->entry());
__ bind(*op->stub()->continuation());
__ verify_oop(op->obj()->as_register());
__ verify_oop(op->obj()->as_register(), FILE_AND_LINE);
}

void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op) {
@@ -2548,7 +2548,7 @@ void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, L
}
assert(obj != k_RInfo, "must be different");

__ verify_oop(obj);
__ verify_oop(obj, FILE_AND_LINE);

// Get object class.
// Not a safepoint as obj null check happens earlier.
@@ -3009,7 +3009,7 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
assert(do_null || do_update, "why are we here?");
assert(!TypeEntries::was_null_seen(current_klass) || do_update, "why are we here?");

__ verify_oop(obj);
__ verify_oop(obj, FILE_AND_LINE);

if (do_null || tmp1 != obj DEBUG_ONLY(|| true)) {
__ z_ltgr(tmp1, obj);
@@ -40,7 +40,7 @@

void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
Label ic_miss, ic_hit;
verify_oop(receiver);
verify_oop(receiver, FILE_AND_LINE);
int klass_offset = oopDesc::klass_offset_in_bytes();

if (!ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(klass_offset)) {
@@ -83,7 +83,7 @@ void C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hd
assert_different_registers(hdr, obj, disp_hdr);
NearLabel done;

verify_oop(obj);
verify_oop(obj, FILE_AND_LINE);

// Load object header.
z_lg(hdr, Address(obj, hdr_offset));
@@ -158,7 +158,7 @@ void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_
// Load object.
z_lg(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
}
verify_oop(obj);
verify_oop(obj, FILE_AND_LINE);
// Test if object header is pointing to the displaced header, and if so, restore
// the displaced header in the object. If the object header is not pointing to
// the displaced header, get the object header instead.
@@ -278,7 +278,7 @@ void C1_MacroAssembler::initialize_object(
// call(RuntimeAddress(Runtime1::entry_for (Runtime1::dtrace_object_alloc_id)));
// }

verify_oop(obj);
verify_oop(obj, FILE_AND_LINE);
}

void C1_MacroAssembler::allocate_array(
@@ -336,16 +336,15 @@ void C1_MacroAssembler::allocate_array(
// call(RuntimeAddress(Runtime1::entry_for (Runtime1::dtrace_object_alloc_id)));
// }

verify_oop(obj);
verify_oop(obj, FILE_AND_LINE);
}


#ifndef PRODUCT

void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
Unimplemented();
// if (!VerifyOops) return;
// verify_oop_addr(Address(SP, stack_offset + STACK_BIAS));
if (!VerifyOops) return;
verify_oop_addr(Address(Z_SP, stack_offset), FILE_AND_LINE);
}

void C1_MacroAssembler::verify_not_null_oop(Register r) {
@@ -354,7 +353,7 @@ void C1_MacroAssembler::verify_not_null_oop(Register r) {
compareU64_and_branch(r, (intptr_t)0, bcondNotEqual, not_null);
stop("non-null oop required");
bind(not_null);
verify_oop(r);
verify_oop(r, FILE_AND_LINE);
}

void C1_MacroAssembler::invalidate_registers(Register preserve1,
@@ -339,7 +339,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
oop_maps->add_gc_map(call_offset, map);
restore_live_registers_except_r2(sasm);

__ verify_oop(obj);
__ verify_oop(obj, FILE_AND_LINE);
__ z_br(Z_R14);
}
break;
@@ -405,7 +405,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
oop_maps->add_gc_map(call_offset, map);
restore_live_registers_except_r2(sasm);

__ verify_oop(obj);
__ verify_oop(obj, FILE_AND_LINE);
__ z_br(Z_R14);
}
break;
@@ -423,7 +423,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
restore_live_registers_except_r2(sasm);

// Z_R2,: new multi array
__ verify_oop(Z_R2);
__ verify_oop(Z_R2, FILE_AND_LINE);
__ z_br(Z_R14);
}
break;
@@ -400,11 +400,11 @@ void G1BarrierSetAssembler::resolve_jobject(MacroAssembler* masm, Register value

__ z_tmll(tmp1, JNIHandles::weak_tag_mask); // Test for jweak tag.
__ z_braz(Lnot_weak);
__ verify_oop(value);
__ verify_oop(value, FILE_AND_LINE);
DecoratorSet decorators = IN_NATIVE | ON_PHANTOM_OOP_REF;
g1_write_barrier_pre(masm, decorators, (const Address*)NULL, value, noreg, tmp1, tmp2, true);
__ bind(Lnot_weak);
__ verify_oop(value);
__ verify_oop(value, FILE_AND_LINE);
__ bind(Ldone);
}

@@ -108,7 +108,7 @@ void BarrierSetAssembler::resolve_jobject(MacroAssembler* masm, Register value,
__ z_nill(value, ~JNIHandles::weak_tag_mask);
__ z_lg(value, 0, value); // Resolve (untagged) jobject.

__ verify_oop(value);
__ verify_oop(value, FILE_AND_LINE);
__ bind(Ldone);
}

@@ -1664,7 +1664,7 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, Address mdo_addr,
compareU64_and_branch(obj, (intptr_t)0, Assembler::bcondEqual, null_seen);
}

verify_oop(obj);
MacroAssembler::verify_oop(obj, FILE_AND_LINE);
load_klass(klass, obj);

// Klass seen before, nothing to do (regardless of unknown bit).
@@ -2073,7 +2073,7 @@ void InterpreterMacroAssembler::access_local_int(Register index, Register dst) {
}

void InterpreterMacroAssembler::verify_oop(Register reg, TosState state) {
if (state == atos) { MacroAssembler::verify_oop(reg); }
if (state == atos) { MacroAssembler::verify_oop(reg, FILE_AND_LINE); }
}

// Inline assembly for:
@@ -3587,7 +3587,7 @@ void MacroAssembler::get_vm_result(Register oop_result) {
z_lg(oop_result, Address(Z_thread, JavaThread::vm_result_offset()));
clear_mem(Address(Z_thread, JavaThread::vm_result_offset()), sizeof(void*));

verify_oop(oop_result);
verify_oop(oop_result, FILE_AND_LINE);
}

void MacroAssembler::get_vm_result_2(Register result) {
@@ -6813,26 +6813,94 @@ void MacroAssembler::verify_thread() {
}
}

// Save and restore functions: Exclude Z_R0.
void MacroAssembler::save_volatile_regs(Register dst, int offset, bool include_fp, bool include_flags) {
z_stmg(Z_R1, Z_R5, offset, dst); offset += 5 * BytesPerWord;
if (include_fp) {
z_std(Z_F0, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F1, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F2, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F3, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F4, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F5, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F6, Address(dst, offset)); offset += BytesPerWord;
z_std(Z_F7, Address(dst, offset)); offset += BytesPerWord;
}
if (include_flags) {
Label done;
z_mvi(Address(dst, offset), 2); // encoding: equal
z_bre(done);
z_mvi(Address(dst, offset), 4); // encoding: higher
z_brh(done);
z_mvi(Address(dst, offset), 1); // encoding: lower
bind(done);
}
}
void MacroAssembler::restore_volatile_regs(Register src, int offset, bool include_fp, bool include_flags) {
z_lmg(Z_R1, Z_R5, offset, src); offset += 5 * BytesPerWord;
if (include_fp) {
z_ld(Z_F0, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F1, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F2, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F3, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F4, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F5, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F6, Address(src, offset)); offset += BytesPerWord;
z_ld(Z_F7, Address(src, offset)); offset += BytesPerWord;
}
if (include_flags) {
z_cli(Address(src, offset), 2); // see encoding above
}
}

// Plausibility check for oops.
void MacroAssembler::verify_oop(Register oop, const char* msg) {
if (!VerifyOops) return;

BLOCK_COMMENT("verify_oop {");
Register tmp = Z_R0;
unsigned int nbytes_save = 5*BytesPerWord;
address entry = StubRoutines::verify_oop_subroutine_entry_address();
unsigned int nbytes_save = (5 + 8 + 1) * BytesPerWord;
address entry_addr = StubRoutines::verify_oop_subroutine_entry_address();

save_return_pc();

// Push frame, but preserve flags
z_lgr(Z_R0, Z_SP);
z_lay(Z_SP, -((int64_t)nbytes_save + frame::z_abi_160_size), Z_SP);
z_stg(Z_R0, _z_abi(callers_sp), Z_SP);

save_volatile_regs(Z_SP, frame::z_abi_160_size, true, true);

lgr_if_needed(Z_ARG2, oop);
load_const_optimized(Z_ARG1, (address)msg);
load_const_optimized(Z_R1, entry_addr);
z_lg(Z_R1, 0, Z_R1);
call_c(Z_R1);

restore_volatile_regs(Z_SP, frame::z_abi_160_size, true, true);
pop_frame();
restore_return_pc();

BLOCK_COMMENT("} verify_oop ");
}

void MacroAssembler::verify_oop_addr(Address addr, const char* msg) {
if (!VerifyOops) return;

BLOCK_COMMENT("verify_oop {");
unsigned int nbytes_save = (5 + 8) * BytesPerWord;
address entry_addr = StubRoutines::verify_oop_subroutine_entry_address();

save_return_pc();
push_frame_abi160(nbytes_save);
z_stmg(Z_R1, Z_R5, frame::z_abi_160_size, Z_SP);
unsigned int frame_size = push_frame_abi160(nbytes_save); // kills Z_R0
save_volatile_regs(Z_SP, frame::z_abi_160_size, true, false);

z_lgr(Z_ARG2, oop);
load_const(Z_ARG1, (address) msg);
load_const(Z_R1, entry);
z_lg(Z_ARG2, addr.plus_disp(frame_size));
load_const_optimized(Z_ARG1, (address)msg);
load_const_optimized(Z_R1, entry_addr);
z_lg(Z_R1, 0, Z_R1);
call_c(Z_R1);

z_lmg(Z_R1, Z_R5, frame::z_abi_160_size, Z_SP);
restore_volatile_regs(Z_SP, frame::z_abi_160_size, true, false);
pop_frame();
restore_return_pc();

@@ -973,8 +973,15 @@ class MacroAssembler: public Assembler {
// Verify Z_thread contents.
void verify_thread();

// Save and restore functions: Exclude Z_R0.
void save_volatile_regs( Register dst, int offset, bool include_fp, bool include_flags);
void restore_volatile_regs(Register src, int offset, bool include_fp, bool include_flags);

// Only if +VerifyOops.
// Kills Z_R0.
void verify_oop(Register reg, const char* s = "broken oop");
// Kills Z_R0, condition code.
void verify_oop_addr(Address addr, const char* msg = "contains broken oop");

// TODO: verify_method and klass metadata (compare against vptr?).
void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}

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