8285281: [x86] Add C2 mid-end and back-end implementation for COMPRESS_BITS and EXPAND_BITS operations #195

jatin-bhateja · 2022-04-21T13:15:59Z

Summary of changes:

Patch intrinsifies following newly added Java SE APIs
1. Integer.compress
2. Integer.expand
3. Long.compress
4. Long.expand
Adds C2 IR nodes and corresponding ideal transformations for new operations.
Inline expansion of new vector operations COMPRESS_BITS and EXPAND_BITS are performed using their scalar counterparts and lane insertion/extraction operations.
Performance of JIT sequence generated using above approach vs directly vectorizing scalar algorithm using existing vector APIs is within in +/-%10 range depending on the width of the operation, since X86 offers direct instructions PEXT/PDEP for parallel bit extraction and deposition operations hence performance of scalar loop is always superior to corresponding vector operations.
Adds an IR framework based test to validate newly introduced IR transformations.

Kindly review and share your feedback.

Best Regards,
Jatin

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Issue

JDK-8285281: [x86] Add C2 mid-end and back-end implementation for COMPRESS_BITS and EXPAND_BITS operations

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Checkout this PR locally:
$ git fetch https://git.openjdk.java.net/panama-vector pull/195/head:pull/195
$ git checkout pull/195

Update a local copy of the PR:
$ git checkout pull/195
$ git pull https://git.openjdk.java.net/panama-vector pull/195/head

Using Skara CLI tools

Checkout this PR locally:
$ git pr checkout 195

View PR using the GUI difftool:
$ git pr show -t 195

Using diff file

Download this PR as a diff file:
https://git.openjdk.java.net/panama-vector/pull/195.diff

…BITS and EXPAND_BITS operations

…irectly calls new [Integer/Long].[compress/expand] Java SE APIs

bridgekeeper · 2022-04-21T13:16:41Z

👋 Welcome back jbhateja! A progress list of the required criteria for merging this PR into vectorIntrinsics will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

mlbridge · 2022-04-21T13:21:22Z

Webrevs

PaulSandoz · 2022-04-21T15:12:08Z

See https://git.openjdk.java.net/panama-vector/pull/194 which removes the various compress/expand implementations

PaulSandoz · 2022-04-21T15:14:09Z

Is it worth the additional complexity in C2 over just depending on the fallback? Actually I misunderstood, you are making intrinsic the scalar implementations. I think that should be a PR against the jdk repository.

sviswa7 · 2022-04-21T16:27:54Z

I agree with Paul that the scalar Integer.compress, Integer.expand, Long.compress and Long.expand intrinsication should be a PR against the mainline. Also since we are now using the scalar intrinsics, the vector CompressV and ExpandV node generation can be removed.

XiaohongGong · 2022-04-22T09:14:09Z

src/hotspot/share/opto/vectorIntrinsics.cpp

+        tty->print_cr("  ** Rejected vector op (%s,%s,%d) because architecture does not support variable vector shifts",
+                      NodeClassNames[sopc], type2name(type), num_elem);


The comment should be updated to "bitshuffle" related.

XiaohongGong · 2022-04-22T09:15:06Z

src/hotspot/share/opto/vectorIntrinsics.cpp

@@ -322,6 +346,24 @@ static bool is_klass_initialized(const TypeInstPtr* vec_klass) {
  return klass->is_initialized();
 }

+Node* LibraryCallKit::gen_bitshuffle_operation(int voper, BasicType elem_bt, int num_elem, Node* opd1, Node* opd2) {


Could you please rename voper to opc ? The name looks like the opcode expected to be a vector type.

jatin-bhateja · 2022-04-22T17:15:06Z

Is it worth the additional complexity in C2 over just depending on the fallback? Actually I misunderstood, you are making intrinsic the scalar implementations. I think that should be a PR against the jdk repository.

I initially tried doing this in Java side, by bringing the fall back implementation to forefront and basing that over lane/withLane and scalar compress/expand operations, but C2 based inline expansion generates better code and almost shows 2X the performance gain. I can rebase this patch on JDK mainline as suggested.

XiaohongGong · 2022-04-24T03:46:26Z

Also please update the latest copyright to 2022 to all the touched files. Thanks!

XiaohongGong · 2022-04-24T03:47:51Z

src/hotspot/share/opto/intrinsicnode.hpp

+  virtual int Opcode() const;
+  virtual Node* Ideal(PhaseGVN* phase, bool can_reshape);
+  virtual Node* Identity(PhaseGVN* phase);
+


Please remove the blank line in line-285. Thanks!

XiaohongGong · 2022-04-24T03:48:56Z

src/hotspot/share/opto/intrinsicnode.hpp

 };
+//----------------------------CompressBits/ExpandBits---------------------------


Style: please insert a blank line between line 263-264

XiaohongGong · 2022-04-24T04:15:43Z

src/hotspot/share/opto/intrinsicnode.cpp

+  if (n->bottom_type()->isa_int()) {
+    // compress(x, 0) == 0
+    if(phase->type(n->in(2))->higher_equal(TypeInt::ZERO)) return n->in(2);
+    // compress(x, -1) == x
+    if(phase->type(n->in(2))->higher_equal( TypeInt::MINUS_1)) return n->in(1);
+  } else {
+    assert(n->bottom_type()->isa_long(), "");
+    // compress(x, 0) == 0
+    if(phase->type(n->in(2))->higher_equal(TypeLong::ZERO)) return n->in(2);
+    // compress(x, -1) == x
+    if(phase->type(n->in(2))->higher_equal( TypeLong::MINUS_1)) return n->in(1);
+  }


The codes are almost the same for int and long type except for the "ZERO and MINUS_1" node. Could you please remove the duplicate codes by just defining different ZERO and MUNUS_1 nodes for int and long?

One more style issue: higher_equal( TypeLong::MINUS_1) -> higher_equal(TypeLong::MINUS_1)

TypeInteger can work. https://github.com/openjdk/jdk/blob/master/src/hotspot/share/opto/type.cpp#L1416

XiaohongGong · 2022-04-24T04:20:27Z

src/hotspot/share/opto/library_call.cpp

+  Node* n = NULL;
+  switch (id) {
+    case vmIntrinsics::_compress_i:  n = new CompressBitsNode(argument(0), argument(1), TypeInt::INT); break;
+    case vmIntrinsics::_expand_i:    n = new ExpandBitsNode(argument(0),  argument(1), TypeInt::INT); break;


Style: one more space after new ExpandBitsNode(argument(0),

XiaohongGong · 2022-04-24T04:23:14Z

src/hotspot/share/opto/vectorIntrinsics.cpp

@@ -67,6 +67,20 @@ static bool is_vector_shuffle(ciKlass* klass) {
  return klass->is_subclass_of(ciEnv::current()->vector_VectorShuffle_klass());
 }

+bool LibraryCallKit::arch_supports_vector_bitshuffle(int opc, int num_elem, BasicType elem_bt) {


Could you please add an assertion for opc that it should be Op_CompressBitsV or Op_ExpandBitsV ?

jatin-bhateja · 2022-04-26T10:46:44Z

Review comments resolved, patch will be posted on JDK-mainline for review.

e1iu · 2022-04-26T16:24:23Z

LGTM.

XiaohongGong · 2022-05-06T02:23:27Z

src/hotspot/share/opto/vectorIntrinsics.cpp

+  } else if (VectorNode::is_bitshuffle_opcode(sopc) && !Matcher::match_rule_supported_vector(sopc, num_elem, elem_bt)) {
+    operation = gen_bitshuffle_operation(opc, elem_bt, num_elem, opd1, opd2);
  } else {


I'm afraid that you should add the Op_CompressBitsV and Op_ExpandBitsV node creation in VectorNode::make(). If the backend support these two ops, the jvm crashes due to missing creation of these two nodes. I met the issue when I try to support the backend for ARM SVE:

Internal Error (panama-vector/src/hotspot/share/opto/vectornode.cpp:657), pid=152820, tid=152852 # fatal error: Missed vector creation for 'CompressBitsV'

XiaohongGong · 2022-05-06T07:13:43Z

Please don't forget to add the new added vector ops like CompressBitsV and ExpandBitsV to function https://github.com/openjdk/jdk/blob/master/src/hotspot/share/adlc/formssel.cpp#L4208. Or the vector type info might be missing by matcher as expected. Thanks!

jatin-bhateja · 2022-06-01T16:59:43Z

Pull request is created against JDK-mainline, closing this PR.

jatin-bhateja · 2022-06-01T17:00:22Z

Thanks @XiaohongGong , @theRealELiu for reviews.

Jatin Bhateja added 3 commits April 21, 2022 01:58

8285281: Add C2 mid-end and back-end implementation for bit COMPRESS_…

e971302

…BITS and EXPAND_BITS operations

8285281: Removing redundant import statement.

e374167

8285281: Removing CompressExpand.java since fallback implementation d…

4106ff8

…irectly calls new [Integer/Long].[compress/expand] Java SE APIs

jatin-bhateja changed the title ~~8285281: [x86] Add C2 mid-end and back-end implementation for bit COMPRESS_BITS and EXPAND_BITS operations~~ 8285281: [x86] Add C2 mid-end and back-end implementation for COMPRESS_BITS and EXPAND_BITS operations Apr 21, 2022

openjdk bot added the rfr label Apr 21, 2022

XiaohongGong reviewed Apr 22, 2022

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XiaohongGong reviewed Apr 24, 2022

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8285281: Review comments resolved.

3fd0291

XiaohongGong reviewed May 6, 2022

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jatin-bhateja closed this Jun 1, 2022

Bhavana-Kilambi mentioned this pull request Feb 6, 2023

8301012: [vectorapi]: Intrinsify CompressBitsV/ExpandBitsV and add the AArch64 SVE backend implementation openjdk/jdk#12446

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3 tasks

		tty->print_cr(" ** Rejected vector op (%s,%s,%d) because architecture does not support variable vector shifts",
		NodeClassNames[sopc], type2name(type), num_elem);

		};
		//----------------------------CompressBits/ExpandBits---------------------------

8285281: [x86] Add C2 mid-end and back-end implementation for COMPRESS_BITS and EXPAND_BITS operations #195

8285281: [x86] Add C2 mid-end and back-end implementation for COMPRESS_BITS and EXPAND_BITS operations #195

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jatin-bhateja commented Apr 21, 2022 •

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