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8266287: Basic mask IR implementation for the Vector API masking feature support #78
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@@ -415,7 +415,9 @@ macro(LoadVector) | ||
macro(LoadVectorGather) | ||
macro(StoreVector) | ||
macro(StoreVectorScatter) | ||
macro(LoadVectorMask) | ||
macro(LoadVectorMasked) | ||
macro(StoreVectorMask) | ||
macro(StoreVectorMasked) | ||
macro(VectorCmpMasked) | ||
macro(VectorMaskGen) | ||
@@ -473,3 +475,7 @@ macro(VectorCastL2X) | ||
macro(VectorCastF2X) | ||
macro(VectorCastD2X) | ||
macro(VectorInsert) | ||
macro(MaskAll) | ||
macro(AndVMask) | ||
macro(OrVMask) | ||
macro(XorVMask) | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Since you have used existing IR nodes for other commutative vector operations like Add/Sub/Mul, why specialized masked IR for OrV/AndV/XorV There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. These three nodes are used for the vector mask logical operations while not for the masked vector logics. E.g |
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Matcher rules based on proposed masked IR shall look like following
match(Set dst AddVI (Binary vsrc1 vsrc2) mask)
AddVI is still commutative and generated DFA will check for appropriate child states i.e.
kid[0]->state == _Binary_vec_vec && kid[1]->state == _mask
So even if matcher generates additional check by swapping the states of the two child nodes it should still be ok. Can you kindly elaborate the need for this change.
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Yes, actually that's ok if matcher swaps the two operands. Avoiding the swapping could avoid generating unneeded rules which could reduce the whole code size.