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8293524: RISC-V: Use macro-assembler functions as appropriate
Reviewed-by: gcao, fyang Backport-of: 43e191d64b0094cc1ece61929c32e017ee90c0c8
1 parent d46c73c commit 0d7892b

12 files changed

+76
-76
lines changed

src/hotspot/cpu/riscv/c1_LIRAssembler_arraycopy_riscv.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -95,14 +95,14 @@ void LIR_Assembler::arraycopy_simple_check(Register src, Register src_pos, Regis
9595
if (!(flags & LIR_OpArrayCopy::LIR_OpArrayCopy::dst_objarray)) {
9696
__ load_klass(tmp, dst);
9797
__ lw(t0, Address(tmp, in_bytes(Klass::layout_helper_offset())));
98-
__ li(t1, Klass::_lh_neutral_value);
98+
__ mv(t1, Klass::_lh_neutral_value);
9999
__ bge(t0, t1, *stub->entry(), /* is_far */ true);
100100
}
101101

102102
if (!(flags & LIR_OpArrayCopy::LIR_OpArrayCopy::src_objarray)) {
103103
__ load_klass(tmp, src);
104104
__ lw(t0, Address(tmp, in_bytes(Klass::layout_helper_offset())));
105-
__ li(t1, Klass::_lh_neutral_value);
105+
__ mv(t1, Klass::_lh_neutral_value);
106106
__ bge(t0, t1, *stub->entry(), /* is_far */ true);
107107
}
108108
}

src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp

+4-4
Original file line numberDiff line numberDiff line change
@@ -1077,7 +1077,7 @@ void LIR_Assembler::type_profile_helper(Register mdo, ciMethodData *md, ciProfil
10771077
__ ld(t1, recv_addr);
10781078
__ bnez(t1, next_test);
10791079
__ sd(recv, recv_addr);
1080-
__ li(t1, DataLayout::counter_increment);
1080+
__ mv(t1, DataLayout::counter_increment);
10811081
__ sd(t1, Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i))));
10821082
__ j(*update_done);
10831083
__ bind(next_test);
@@ -1630,7 +1630,7 @@ void LIR_Assembler::check_conflict(ciKlass* exact_klass, intptr_t current_klass,
16301630

16311631
if (TypeEntries::is_type_none(current_klass)) {
16321632
__ beqz(t1, none);
1633-
__ li(t0, (u1)TypeEntries::null_seen);
1633+
__ mv(t0, (u1)TypeEntries::null_seen);
16341634
__ beq(t0, t1, none);
16351635
// There is a chance that the checks above (re-reading profiling
16361636
// data from memory) fail if another thread has just set the
@@ -1680,7 +1680,7 @@ void LIR_Assembler::check_no_conflict(ciKlass* exact_klass, intptr_t current_kla
16801680
Label ok;
16811681
__ ld(t0, mdo_addr);
16821682
__ beqz(t0, ok);
1683-
__ li(t1, (u1)TypeEntries::null_seen);
1683+
__ mv(t1, (u1)TypeEntries::null_seen);
16841684
__ beq(t0, t1, ok);
16851685
// may have been set by another thread
16861686
__ membar(MacroAssembler::LoadLoad);
@@ -2261,7 +2261,7 @@ void LIR_Assembler::store_parameter(jint c, int offset_from_rsp_in_words) {
22612261
assert(offset_from_rsp_in_words >= 0, "invalid offset from rsp");
22622262
int offset_from_rsp_in_bytes = offset_from_rsp_in_words * BytesPerWord;
22632263
assert(offset_from_rsp_in_bytes < frame_map()->reserved_argument_area_size(), "invalid offset");
2264-
__ li(t0, c);
2264+
__ mv(t0, c);
22652265
__ sd(t0, Address(sp, offset_from_rsp_in_bytes));
22662266
}
22672267

src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr
9595
// assuming both the stack pointer and page_size have their least
9696
// significant 2 bits cleared and page_size is a power of 2
9797
sub(hdr, hdr, sp);
98-
li(t0, aligned_mask - os::vm_page_size());
98+
mv(t0, aligned_mask - os::vm_page_size());
9999
andr(hdr, hdr, t0);
100100
// for recursive locking, the result is zero => save it in the displaced header
101101
// location (NULL in the displaced hdr location indicates recursive locking)

src/hotspot/cpu/riscv/c1_Runtime1_riscv.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1005,7 +1005,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
10051005
__ check_klass_subtype_slow_path(x14, x10, x12, x15, NULL, &miss);
10061006

10071007
// fallthrough on success:
1008-
__ li(t0, 1);
1008+
__ mv(t0, 1);
10091009
__ sd(t0, Address(sp, (result_off) * VMRegImpl::stack_slot_size)); // result
10101010
__ pop_reg(RegSet::of(x10, x12, x14, x15), sp);
10111011
__ ret();
@@ -1195,7 +1195,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
11951195
default:
11961196
{
11971197
StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1198-
__ li(x10, (int) id);
1198+
__ mv(x10, (int)id);
11991199
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), x10);
12001200
__ should_not_reach_here();
12011201
}

src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -486,7 +486,7 @@ void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
486486
if (is_cae) {
487487
__ mv(result, expected);
488488
} else {
489-
__ addi(result, zr, 1);
489+
__ mv(result, 1);
490490
}
491491
__ j(done);
492492

src/hotspot/cpu/riscv/interp_masm_riscv.cpp

+15-15
Original file line numberDiff line numberDiff line change
@@ -512,7 +512,7 @@ void InterpreterMacroAssembler::dispatch_base(TosState state,
512512
bnez(t1, safepoint);
513513
}
514514
if (table == Interpreter::dispatch_table(state)) {
515-
li(t1, Interpreter::distance_from_dispatch_table(state));
515+
mv(t1, Interpreter::distance_from_dispatch_table(state));
516516
add(t1, Rs, t1);
517517
shadd(t1, t1, xdispatch, t1, 3);
518518
} else {
@@ -805,7 +805,7 @@ void InterpreterMacroAssembler::lock_object(Register lock_reg)
805805
// least significant 3 bits clear.
806806
// NOTE: the oopMark is in swap_reg x10 as the result of cmpxchg
807807
sub(swap_reg, swap_reg, sp);
808-
li(t0, (int64_t)(7 - os::vm_page_size()));
808+
mv(t0, (int64_t)(7 - os::vm_page_size()));
809809
andr(swap_reg, swap_reg, t0);
810810

811811
// Save the test result, for recursive case, the result is zero
@@ -1657,7 +1657,7 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
16571657

16581658
ld(t0, mdo_addr);
16591659
beqz(t0, none);
1660-
li(tmp, (u1)TypeEntries::null_seen);
1660+
mv(tmp, (u1)TypeEntries::null_seen);
16611661
beq(t0, tmp, none);
16621662
// There is a chance that the checks above (re-reading profiling
16631663
// data from memory) fail if another thread has just set the
@@ -1692,10 +1692,10 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
16921692

16931693
lbu(t0, Address(mdp, in_bytes(DataLayout::tag_offset()) - off_to_start));
16941694
if (is_virtual) {
1695-
li(tmp, (u1)DataLayout::virtual_call_type_data_tag);
1695+
mv(tmp, (u1)DataLayout::virtual_call_type_data_tag);
16961696
bne(t0, tmp, profile_continue);
16971697
} else {
1698-
li(tmp, (u1)DataLayout::call_type_data_tag);
1698+
mv(tmp, (u1)DataLayout::call_type_data_tag);
16991699
bne(t0, tmp, profile_continue);
17001700
}
17011701

@@ -1725,15 +1725,15 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17251725
mv(index, zr); // index < TypeProfileArgsLimit
17261726
bind(loop);
17271727
bgtz(index, profileReturnType);
1728-
li(t0, (int)MethodData::profile_return());
1728+
mv(t0, (int)MethodData::profile_return());
17291729
beqz(t0, profileArgument); // (index > 0 || MethodData::profile_return()) == false
17301730
bind(profileReturnType);
17311731
// If return value type is profiled we may have no argument to profile
17321732
ld(tmp, Address(mdp, in_bytes(TypeEntriesAtCall::cell_count_offset())));
17331733
mv(t1, - TypeStackSlotEntries::per_arg_count());
17341734
mul(t1, index, t1);
17351735
add(tmp, tmp, t1);
1736-
li(t1, TypeStackSlotEntries::per_arg_count());
1736+
mv(t1, TypeStackSlotEntries::per_arg_count());
17371737
add(t0, mdp, off_to_args);
17381738
blt(tmp, t1, done);
17391739

@@ -1744,8 +1744,8 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17441744
// stack offset o (zero based) from the start of the argument
17451745
// list, for n arguments translates into offset n - o - 1 from
17461746
// the end of the argument list
1747-
li(t0, stack_slot_offset0);
1748-
li(t1, slot_step);
1747+
mv(t0, stack_slot_offset0);
1748+
mv(t1, slot_step);
17491749
mul(t1, index, t1);
17501750
add(t0, t0, t1);
17511751
add(t0, mdp, t0);
@@ -1755,8 +1755,8 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17551755
Address arg_addr = argument_address(tmp);
17561756
ld(tmp, arg_addr);
17571757

1758-
li(t0, argument_type_offset0);
1759-
li(t1, type_step);
1758+
mv(t0, argument_type_offset0);
1759+
mv(t1, type_step);
17601760
mul(t1, index, t1);
17611761
add(t0, t0, t1);
17621762
add(mdo_addr, mdp, t0);
@@ -1768,7 +1768,7 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17681768

17691769
// increment index by 1
17701770
addi(index, index, 1);
1771-
li(t1, TypeProfileArgsLimit);
1771+
mv(t1, TypeProfileArgsLimit);
17721772
blt(index, t1, loop);
17731773
bind(loopEnd);
17741774

@@ -1823,13 +1823,13 @@ void InterpreterMacroAssembler::profile_return_type(Register mdp, Register ret,
18231823
// length
18241824
Label do_profile;
18251825
lbu(t0, Address(xbcp, 0));
1826-
li(tmp, (u1)Bytecodes::_invokedynamic);
1826+
mv(tmp, (u1)Bytecodes::_invokedynamic);
18271827
beq(t0, tmp, do_profile);
1828-
li(tmp, (u1)Bytecodes::_invokehandle);
1828+
mv(tmp, (u1)Bytecodes::_invokehandle);
18291829
beq(t0, tmp, do_profile);
18301830
get_method(tmp);
18311831
lhu(t0, Address(tmp, Method::intrinsic_id_offset_in_bytes()));
1832-
li(t1, vmIntrinsics::_compiledLambdaForm);
1832+
mv(t1, vmIntrinsics::_compiledLambdaForm);
18331833
bne(t0, t1, profile_continue);
18341834
bind(do_profile);
18351835
}

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