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DingliZhangzifeihan
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8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule
Reviewed-by: fyang, gcao Backport-of: 3ad6aef1496de914b70f00005465e4b22f248d4f
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src/hotspot/cpu/riscv/riscv.ad

Lines changed: 38 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9543,6 +9543,23 @@ instruct cmovI_cmpL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOp cop) %
95439543
ins_pipe(pipe_class_compare);
95449544
%}
95459545

9546+
instruct cmovI_cmpUL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOpU cop) %{
9547+
match(Set dst (CMoveI (Binary cop (CmpUL op1 op2)) (Binary dst src)));
9548+
ins_cost(ALU_COST + BRANCH_COST);
9549+
9550+
format %{
9551+
"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpUL\n\t"
9552+
%}
9553+
9554+
ins_encode %{
9555+
__ enc_cmove($cop$$cmpcode | MacroAssembler::unsigned_branch_mask,
9556+
as_Register($op1$$reg), as_Register($op2$$reg),
9557+
as_Register($dst$$reg), as_Register($src$$reg));
9558+
%}
9559+
9560+
ins_pipe(pipe_class_compare);
9561+
%}
9562+
95469563
instruct cmovL_cmpL(iRegLNoSp dst, iRegL src, iRegL op1, iRegL op2, cmpOp cop) %{
95479564
match(Set dst (CMoveL (Binary cop (CmpL op1 op2)) (Binary dst src)));
95489565
ins_cost(ALU_COST + BRANCH_COST);
@@ -9577,22 +9594,39 @@ instruct cmovL_cmpUL(iRegLNoSp dst, iRegL src, iRegL op1, iRegL op2, cmpOpU cop)
95779594
ins_pipe(pipe_class_compare);
95789595
%}
95799596

9580-
instruct cmovI_cmpUL(iRegINoSp dst, iRegI src, iRegL op1, iRegL op2, cmpOpU cop) %{
9581-
match(Set dst (CMoveI (Binary cop (CmpUL op1 op2)) (Binary dst src)));
9597+
instruct cmovL_cmpI(iRegLNoSp dst, iRegL src, iRegI op1, iRegI op2, cmpOp cop) %{
9598+
match(Set dst (CMoveL (Binary cop (CmpI op1 op2)) (Binary dst src)));
95829599
ins_cost(ALU_COST + BRANCH_COST);
9600+
95839601
format %{
9584-
"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovI_cmpUL\n\t"
9602+
"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovL_cmpI\n\t"
95859603
%}
95869604

95879605
ins_encode %{
9588-
__ enc_cmove($cop$$cmpcode | MacroAssembler::unsigned_branch_mask,
9606+
__ enc_cmove($cop$$cmpcode,
95899607
as_Register($op1$$reg), as_Register($op2$$reg),
95909608
as_Register($dst$$reg), as_Register($src$$reg));
95919609
%}
95929610

95939611
ins_pipe(pipe_class_compare);
95949612
%}
95959613

9614+
instruct cmovL_cmpU(iRegLNoSp dst, iRegL src, iRegI op1, iRegI op2, cmpOpU cop) %{
9615+
match(Set dst (CMoveL (Binary cop (CmpU op1 op2)) (Binary dst src)));
9616+
ins_cost(ALU_COST + BRANCH_COST);
9617+
9618+
format %{
9619+
"CMove $dst, ($op1 $cop $op2), $dst, $src\t#@cmovL_cmpU\n\t"
9620+
%}
9621+
9622+
ins_encode %{
9623+
__ enc_cmove($cop$$cmpcode | MacroAssembler::unsigned_branch_mask,
9624+
as_Register($op1$$reg), as_Register($op2$$reg),
9625+
as_Register($dst$$reg), as_Register($src$$reg));
9626+
%}
9627+
9628+
ins_pipe(pipe_class_compare);
9629+
%}
95969630

95979631
// ============================================================================
95989632
// Procedure Call/Return Instructions

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