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DingliZhangRealFYang
authored andcommitted
8293524: RISC-V: Use macro-assembler functions as appropriate
Reviewed-by: fyang Backport-of: 43e191d64b0094cc1ece61929c32e017ee90c0c8
1 parent b934d81 commit 719b5a8

13 files changed

+78
-78
lines changed

src/hotspot/cpu/riscv/c1_LIRAssembler_arraycopy_riscv.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -95,14 +95,14 @@ void LIR_Assembler::arraycopy_simple_check(Register src, Register src_pos, Regis
9595
if (!(flags & LIR_OpArrayCopy::LIR_OpArrayCopy::dst_objarray)) {
9696
__ load_klass(tmp, dst);
9797
__ lw(t0, Address(tmp, in_bytes(Klass::layout_helper_offset())));
98-
__ li(t1, Klass::_lh_neutral_value);
98+
__ mv(t1, Klass::_lh_neutral_value);
9999
__ bge(t0, t1, *stub->entry(), /* is_far */ true);
100100
}
101101

102102
if (!(flags & LIR_OpArrayCopy::LIR_OpArrayCopy::src_objarray)) {
103103
__ load_klass(tmp, src);
104104
__ lw(t0, Address(tmp, in_bytes(Klass::layout_helper_offset())));
105-
__ li(t1, Klass::_lh_neutral_value);
105+
__ mv(t1, Klass::_lh_neutral_value);
106106
__ bge(t0, t1, *stub->entry(), /* is_far */ true);
107107
}
108108
}

src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp

+4-4
Original file line numberDiff line numberDiff line change
@@ -1089,7 +1089,7 @@ void LIR_Assembler::type_profile_helper(Register mdo, ciMethodData *md, ciProfil
10891089
__ ld(t1, recv_addr);
10901090
__ bnez(t1, next_test);
10911091
__ sd(recv, recv_addr);
1092-
__ li(t1, DataLayout::counter_increment);
1092+
__ mv(t1, DataLayout::counter_increment);
10931093
__ sd(t1, Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i))));
10941094
__ j(*update_done);
10951095
__ bind(next_test);
@@ -1639,7 +1639,7 @@ void LIR_Assembler::check_conflict(ciKlass* exact_klass, intptr_t current_klass,
16391639

16401640
if (TypeEntries::is_type_none(current_klass)) {
16411641
__ beqz(t1, none);
1642-
__ li(t0, (u1)TypeEntries::null_seen);
1642+
__ mv(t0, (u1)TypeEntries::null_seen);
16431643
__ beq(t0, t1, none);
16441644
// There is a chance that the checks above (re-reading profiling
16451645
// data from memory) fail if another thread has just set the
@@ -1689,7 +1689,7 @@ void LIR_Assembler::check_no_conflict(ciKlass* exact_klass, intptr_t current_kla
16891689
Label ok;
16901690
__ ld(t0, mdo_addr);
16911691
__ beqz(t0, ok);
1692-
__ li(t1, (u1)TypeEntries::null_seen);
1692+
__ mv(t1, (u1)TypeEntries::null_seen);
16931693
__ beq(t0, t1, ok);
16941694
// may have been set by another thread
16951695
__ membar(MacroAssembler::LoadLoad);
@@ -2248,7 +2248,7 @@ void LIR_Assembler::store_parameter(jint c, int offset_from_rsp_in_words) {
22482248
assert(offset_from_rsp_in_words >= 0, "invalid offset from rsp");
22492249
int offset_from_rsp_in_bytes = offset_from_rsp_in_words * BytesPerWord;
22502250
assert(offset_from_rsp_in_bytes < frame_map()->reserved_argument_area_size(), "invalid offset");
2251-
__ li(t0, c);
2251+
__ mv(t0, c);
22522252
__ sd(t0, Address(sp, offset_from_rsp_in_bytes));
22532253
}
22542254

src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr
101101
// assuming both the stack pointer and page_size have their least
102102
// significant 2 bits cleared and page_size is a power of 2
103103
sub(hdr, hdr, sp);
104-
li(t0, aligned_mask - os::vm_page_size());
104+
mv(t0, aligned_mask - os::vm_page_size());
105105
andr(hdr, hdr, t0);
106106
// for recursive locking, the result is zero => save it in the displaced header
107107
// location (NULL in the displaced hdr location indicates recursive locking)

src/hotspot/cpu/riscv/c1_Runtime1_riscv.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -974,7 +974,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
974974
__ check_klass_subtype_slow_path(x14, x10, x12, x15, NULL, &miss);
975975

976976
// fallthrough on success:
977-
__ li(t0, 1);
977+
__ mv(t0, 1);
978978
__ sd(t0, Address(sp, (result_off) * VMRegImpl::stack_slot_size)); // result
979979
__ pop_reg(RegSet::of(x10, x12, x14, x15), sp);
980980
__ ret();
@@ -1164,7 +1164,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
11641164
default:
11651165
{
11661166
StubFrame f(sasm, "unimplemented entry", dont_gc_arguments, does_not_return);
1167-
__ li(x10, (int) id);
1167+
__ mv(x10, (int)id);
11681168
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), x10);
11691169
__ should_not_reach_here();
11701170
}

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp

+5-5
Original file line numberDiff line numberDiff line change
@@ -815,7 +815,7 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
815815
bind(L);
816816

817817
// A very short string
818-
li(t0, minCharsInWord);
818+
mv(t0, minCharsInWord);
819819
ble(cnt2, t0, SHORT_STRING);
820820

821821
// Compare longwords
@@ -826,7 +826,7 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
826826
ld(tmp1, Address(str1));
827827
beq(str1, str2, DONE);
828828
ld(tmp2, Address(str2));
829-
li(t0, STUB_THRESHOLD);
829+
mv(t0, STUB_THRESHOLD);
830830
bge(cnt2, t0, STUB);
831831
sub(cnt2, cnt2, minCharsInWord);
832832
beqz(cnt2, TAIL_CHECK);
@@ -840,7 +840,7 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
840840
} else if (isLU) { // LU case
841841
lwu(tmp1, Address(str1));
842842
ld(tmp2, Address(str2));
843-
li(t0, STUB_THRESHOLD);
843+
mv(t0, STUB_THRESHOLD);
844844
bge(cnt2, t0, STUB);
845845
addi(cnt2, cnt2, -4);
846846
add(str1, str1, cnt2);
@@ -854,7 +854,7 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
854854
} else { // UL case
855855
ld(tmp1, Address(str1));
856856
lwu(tmp2, Address(str2));
857-
li(t0, STUB_THRESHOLD);
857+
mv(t0, STUB_THRESHOLD);
858858
bge(cnt2, t0, STUB);
859859
addi(cnt2, cnt2, -4);
860860
slli(t0, cnt2, 1);
@@ -1030,7 +1030,7 @@ void C2_MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
10301030

10311031
assert(elem_size == 1 || elem_size == 2, "must be char or byte");
10321032
assert_different_registers(a1, a2, result, cnt1, t0, t1, tmp3, tmp4, tmp5, tmp6);
1033-
li(elem_per_word, wordSize / elem_size);
1033+
mv(elem_per_word, wordSize / elem_size);
10341034

10351035
BLOCK_COMMENT("arrays_equals {");
10361036

src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -523,7 +523,7 @@ void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
523523
if (is_cae) {
524524
__ mv(result, expected);
525525
} else {
526-
__ addi(result, zr, 1);
526+
__ mv(result, 1);
527527
}
528528
__ j(done);
529529

src/hotspot/cpu/riscv/interp_masm_riscv.cpp

+15-15
Original file line numberDiff line numberDiff line change
@@ -527,7 +527,7 @@ void InterpreterMacroAssembler::dispatch_base(TosState state,
527527
bnez(t1, safepoint);
528528
}
529529
if (table == Interpreter::dispatch_table(state)) {
530-
li(t1, Interpreter::distance_from_dispatch_table(state));
530+
mv(t1, Interpreter::distance_from_dispatch_table(state));
531531
add(t1, Rs, t1);
532532
shadd(t1, t1, xdispatch, t1, 3);
533533
} else {
@@ -835,7 +835,7 @@ void InterpreterMacroAssembler::lock_object(Register lock_reg)
835835
// least significant 3 bits clear.
836836
// NOTE: the oopMark is in swap_reg x10 as the result of cmpxchg
837837
sub(swap_reg, swap_reg, sp);
838-
li(t0, (int64_t)(7 - os::vm_page_size()));
838+
mv(t0, (int64_t)(7 - os::vm_page_size()));
839839
andr(swap_reg, swap_reg, t0);
840840

841841
// Save the test result, for recursive case, the result is zero
@@ -1677,7 +1677,7 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
16771677

16781678
ld(t0, mdo_addr);
16791679
beqz(t0, none);
1680-
li(tmp, (u1)TypeEntries::null_seen);
1680+
mv(tmp, (u1)TypeEntries::null_seen);
16811681
beq(t0, tmp, none);
16821682
// There is a chance that the checks above (re-reading profiling
16831683
// data from memory) fail if another thread has just set the
@@ -1712,10 +1712,10 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17121712

17131713
lbu(t0, Address(mdp, in_bytes(DataLayout::tag_offset()) - off_to_start));
17141714
if (is_virtual) {
1715-
li(tmp, (u1)DataLayout::virtual_call_type_data_tag);
1715+
mv(tmp, (u1)DataLayout::virtual_call_type_data_tag);
17161716
bne(t0, tmp, profile_continue);
17171717
} else {
1718-
li(tmp, (u1)DataLayout::call_type_data_tag);
1718+
mv(tmp, (u1)DataLayout::call_type_data_tag);
17191719
bne(t0, tmp, profile_continue);
17201720
}
17211721

@@ -1745,15 +1745,15 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17451745
mv(index, zr); // index < TypeProfileArgsLimit
17461746
bind(loop);
17471747
bgtz(index, profileReturnType);
1748-
li(t0, (int)MethodData::profile_return());
1748+
mv(t0, (int)MethodData::profile_return());
17491749
beqz(t0, profileArgument); // (index > 0 || MethodData::profile_return()) == false
17501750
bind(profileReturnType);
17511751
// If return value type is profiled we may have no argument to profile
17521752
ld(tmp, Address(mdp, in_bytes(TypeEntriesAtCall::cell_count_offset())));
17531753
mv(t1, - TypeStackSlotEntries::per_arg_count());
17541754
mul(t1, index, t1);
17551755
add(tmp, tmp, t1);
1756-
li(t1, TypeStackSlotEntries::per_arg_count());
1756+
mv(t1, TypeStackSlotEntries::per_arg_count());
17571757
add(t0, mdp, off_to_args);
17581758
blt(tmp, t1, done);
17591759

@@ -1764,8 +1764,8 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17641764
// stack offset o (zero based) from the start of the argument
17651765
// list, for n arguments translates into offset n - o - 1 from
17661766
// the end of the argument list
1767-
li(t0, stack_slot_offset0);
1768-
li(t1, slot_step);
1767+
mv(t0, stack_slot_offset0);
1768+
mv(t1, slot_step);
17691769
mul(t1, index, t1);
17701770
add(t0, t0, t1);
17711771
add(t0, mdp, t0);
@@ -1775,8 +1775,8 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17751775
Address arg_addr = argument_address(tmp);
17761776
ld(tmp, arg_addr);
17771777

1778-
li(t0, argument_type_offset0);
1779-
li(t1, type_step);
1778+
mv(t0, argument_type_offset0);
1779+
mv(t1, type_step);
17801780
mul(t1, index, t1);
17811781
add(t0, t0, t1);
17821782
add(mdo_addr, mdp, t0);
@@ -1788,7 +1788,7 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
17881788

17891789
// increment index by 1
17901790
addi(index, index, 1);
1791-
li(t1, TypeProfileArgsLimit);
1791+
mv(t1, TypeProfileArgsLimit);
17921792
blt(index, t1, loop);
17931793
bind(loopEnd);
17941794

@@ -1843,13 +1843,13 @@ void InterpreterMacroAssembler::profile_return_type(Register mdp, Register ret,
18431843
// length
18441844
Label do_profile;
18451845
lbu(t0, Address(xbcp, 0));
1846-
li(tmp, (u1)Bytecodes::_invokedynamic);
1846+
mv(tmp, (u1)Bytecodes::_invokedynamic);
18471847
beq(t0, tmp, do_profile);
1848-
li(tmp, (u1)Bytecodes::_invokehandle);
1848+
mv(tmp, (u1)Bytecodes::_invokehandle);
18491849
beq(t0, tmp, do_profile);
18501850
get_method(tmp);
18511851
lhu(t0, Address(tmp, Method::intrinsic_id_offset_in_bytes()));
1852-
li(t1, static_cast<int>(vmIntrinsics::_compiledLambdaForm));
1852+
mv(t1, static_cast<int>(vmIntrinsics::_compiledLambdaForm));
18531853
bne(t0, t1, profile_continue);
18541854
bind(do_profile);
18551855
}

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