Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

The carry flag implementation is not correct for subtract instructions #139

Open
Rahul-Kande opened this issue Sep 3, 2021 · 2 comments

Comments

@Rahul-Kande
Copy link

Rahul-Kande commented Sep 3, 2021

The carry flag value is not as expected for some cases. For instance, with the following trigger input, since r1 > r3, carry flag should be reset, but it is actually being set.

Issue location: rtl/verilog/mor1kx_execute_alu.v

Triggering input:
//set r1=00020000 and r3=00002000
l.sub r4,r1,r3
Expected output:
Carry flag = 0

mor1kx output:
Carry flag = 1

Please check this bug.

@rkrajnc
Copy link

rkrajnc commented Sep 6, 2021

I can't test this right now, so I'm just guessing, but it seems the problem might be operator precedence in this line:

assign carry_in = adder_do_sub_i | adder_do_carry_i & carry_i;

Besides, shouldn't the statement be using logical operators instead of bitwise?

@skristiansson
Copy link
Member

skristiansson commented Sep 6, 2021 via email

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

3 participants