Core description files for FuseSoC
Verilog VHDL Tcl SystemVerilog C Coq Other
Latest commit faabf2e Mar 5, 2017 @olofk olofk Add SD-card-controller-r1
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cores Add SD-card-controller-r1 Mar 5, 2017
systems sockit: Fix wb_ram instantiation Feb 11, 2017
.gitignore add .gitignore Sep 19, 2013
README.md Update description Apr 10, 2014

README.md

orpsoc-cores

Core description files for FuseSoC