Open SoC Debug Hardware Reference Implementation
SystemVerilog Python Scala Other
Switch branches/tags
Nothing to show
Clone or download
Fetching latest commit…
Cannot retrieve the latest commit at this time.
Permalink
Failed to load latest commit information.
blocks
doc
interconnect
interfaces
modules
test/cocotb
.gitignore
Makefile
Makefrag
README.md
build.sbt
update_testrunner.sh

README.md

Open SoC Debug Hardware Reference Implementation

This repository contains the reference implementation of the Open SoC Debug hardware components (i.e. the parts of OSD integrated into a chip). It's written mainly in SystemVerilog with extension points towards the RISC-V Rocket core written in Chisel.

Documentation

License

The hardware code is licensed under the SolderPad license, a permissive license similar to the Apache 2 license, but adopted for the specialties of licensing digital hardware. The Python/cocotb test code is licensed under the MIT license.